There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

The organization of behavior: A neuropsychological theory

The Personal Interview

What is modal logic

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

In this paper, the minimization of incompletely specified multi-valued functions using functional decomposition is discussed. From the aspect of machine learning, learning samples can be implemented as minterms in multi-valued logic. The representation, can then be decomposed into smaller blocks, resulting in a reduced problem complexity. This gives induced descriptions through structuring, or feature extraction, of a learning problem. Our approach to the decomposition is based on expressing a multi-valued function (learning problem) in terms of a multi-valued decision diagram that allows the use of Don't Cares. The inclusion of Don't Cares is the emphasis for this paper since multi-valued benchmarks are characterized as having many Don't Cares.

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Functional decomposition of MVL functions using multi-valued decision diagrams

This paper presents an important result addressing a fundamental question in synthesizing binary reversible logic circuits for quantum computation. We show that any even-reversible-circuit of n (n > 3) qubits can be realized using NOT gate and Toffoli gate ('2'-Controlled-Not gate), where the numbers of Toffoli and NOT gates required in the realization are bounded by (n+[n 3] )(3 x 2 2n-3 -2 n+2 ) and 4n(n+ [n 3] j )2, respectively. A provable constructive synthesis algorithm is derived. The time complexity of the algorithm is 10 3n 2 . 2 n . Our algorithm is exponentially lower than breadth-first search based synthesis algorithms with respect to space and time complexities.

Group theory based synthesis of binary reversible circuits

The paper presents a generalization of the well-known Grover Algorithm to operate on ternary quantum circuits. We compare complexity of oracles and some of their commonly used components for binary and ternary cases and various sizes and densities of colored graphs. We show that ternary encoding leads to quantum circuits that have significantly less qud its and lower quantum costs. In case of serial realization of quantum computers, our ternary algorithms and circuits are also faster.

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Improved Complexity of Quantum Oracles for Ternary Grover Algorithm for Graph Coloring

There is recently an interest in test generation for reversible circuits, but nothing has been published about fault localization in such circuits. This paper deals with fault localization for binary reversible (permutative) circuits. We concentrate on functional test based fault localization, to detect and locate “stuck-at” faults in a reversible circuit by creating an adaptive tree. A striking property of reversible circuits is that they exhibit “symmetric” adaptive trees. This helps considerably by being able to generate only half of the tree, and the other half is created as the mirror image of the first half. Because each test covers half faults [1] and the fault table has a high density of ones, it is relatively easy to generate the tree. The problem of fault localization of reversible circuits is therefore easier than the same problem for standard irreversible circuits. We present some preliminary results from an approach using traditional adaptive tree methods. We propose also a new efficient algorithm that eliminates the fault table generation and dynamically creates the adaptive fault tree.

/pdf/fault-localization-in-reversible-circuits-is-easier-than-for-1y6d7aw639.pdf

Fault Localization in Reversible Circuits is Easier than for Classical Circuits

A quasi-minimal algorithm for canonical restricted mixed polarity (CRMP) AND/XOR forms is presented. These forms, which include the consistent and inconsistent generalized Reed-Muller (GRM) forms, are both very easily testable and, on average, have smaller numbers of terms than sum-of-product (SOP) expressions. The set of test vectors for detecting stuck-at and bridging faults of a function realized in CRMP forms, like that of consistent (GRM) forms, is independent of the function. This test can be of order (n+4)r, where n is the number of variables in the function and r is the number of component consistent GRMs in the CRMP. The experimental results confirm the compactness of CRMPs as compared to SOP expressions. >

Marek Perkowski

Papers

Functional decomposition of MVL functions using multi-valued decision diagrams

Group theory based synthesis of binary reversible circuits

Improved Complexity of Quantum Oracles for Ternary Grover Algorithm for Graph Coloring

Fault Localization in Reversible Circuits is Easier than for Classical Circuits

Fast minimization of mixed-polarity AND/XOR canonical networks