M
Matthew Cohen
Researcher at IBM
Publications - Â 3
Citations - Â 119
Matthew Cohen is an academic researcher from IBM. The author has contributed to research in topics: Inference & Computer science. The author has an hindex of 2, co-authored 3 publications receiving 12 citations.
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Proceedings ArticleDOI
A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling
Ankur Agrawal,Sae Kyu Lee,Joel Abraham Silberman,Matthew M. Ziegler,Mingu Kang,Swagath Venkataramani,Nianzheng Cao,Bruce M. Fleischer,Michael A. Guillorn,Matthew Cohen,Silvia Melitta Mueller,Jinwook Oh,Martin Lutz,Jinwook Jung,Siyu Koswatta,Ching Zhou,Vidhi Zalani,James J. Bonanno,Robert Casatuta,Chia-Yu Chen,Jungwook Choi,Howard M. Haynie,Alyssa Herbert,Radhika Jain,Monodeep Kar,Kyu-hyoun Kim,Li Yulong,Zhibin Ren,Scot H. Rider,Marcel Schaal,Kerstin Schelm,Michael R. Scheuermann,Xiao Sun,Hung Tran,Naigang Wang,Wei Wang,Xin Zhang,Vinay Velji Shah,Brian W. Curran,Vijayalakshmi Srinivasan,Pong-Fei Lu,Sunil Shukla,Leland Chang,Kailash Gopalakrishnan +43 more
TL;DR: In this article, a 4-core AI chip in 7nm EUV technology is presented to exploit cutting-edge algorithmic advances for iso-accurate models in low-precision training and inference to achieve leading-edge power-performance.
Proceedings ArticleDOI
RaPiD: AI accelerator for ultra-low precision training and inference
Swagath Venkataramani,Vijayalakshmi Srinivasan,Wei Wang,Sanchari Sen,Jintao Zhang,Ankur Agrawal,Monodeep Kar,Shubham Jain,Alberto Mannari,Hoang Tran,Li Yulong,Eri Ogawa,Kazuaki Ishizaki,Hiroshi Inoue,Marcel Schaal,Mauricio J. Serrano,Jungwook Choi,Xiao Sun,Naigang Wang,Chia-Yu Chen,Allison Allain,James Bonano,Nianzheng Cao,Robert Casatuta,Matthew Cohen,Bruce M. Fleischer,Michael A. Guillorn,Howard M. Haynie,Jinwook Jung,Mingu Kang,Kyu-hyoun Kim,Siyu Koswatta,Sae Kyu Lee,Martin Lutz,Silvia Melitta Mueller,Jinwook Oh,Ashish Ranjan,Zhibin Ren,Scot H. Rider,Kerstin Schelm,Michael R. Scheuermann,Joel Abraham Silberman,Jie Yang,Vidhi Zalani,Xin Zhang,Ching Zhou,Matt Ziegler,Vinay Velji Shah,Moriyoshi Ohara,Pong-Fei Lu,Brian W. Curran,Sunil Shukla,Leland Chang,Kailash Gopalakrishnan +53 more
TL;DR: RaPiD1 as mentioned in this paper is a 4-core AI accelerator chip supporting a spectrum of precisions, namely, 16 and 8-bit floating-point and 4 and 2-bit fixed-point.
Proceedings ArticleDOI
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
Jinwook Oh,Sae Kyu Lee,Mingu Kang,Matthew M. Ziegler,Joel Abraham Silberman,Ankur Agrawal,Swagath Venkataramani,Bruce M. Fleischer,Michael A. Guillorn,Jungwook Choi,Wei Wang,Silvia Melitta Mueller,Shimon Ben-Yehuda,James J. Bonanno,Nianzheng Cao,Robert Casatuta,Chia-Yu Chen,Matthew Cohen,Erez Ophir,Thomas W. Fox,George D. Gristede,Howard M. Haynie,Vicktoria Ivanov,Siyu Koswatta,Shih-Hsien Lo,Martin Lutz,Gary W. Maier,Alex Mesh,Yevgeny Nustov,Scot H. Rider,Marcel Schaal,Michael R. Scheuermann,Xiao Sun,Naigang Wang,Fanchieh Yee,Ching Zhou,Vinay Velji Shah,Brian W. Curran,Vijayalakshmi Srinivasan,Pong-Fei Lu,Sunil Shukla,Kailash Gopalakrishnan,Leland Chang +42 more
TL;DR: A processor core is presented for AI training and inference products that achieves leading-edge compute efficiency for robust fp16 training via efficient heterogeneous 2-D systolic array-SIMD compute engines leveraging compact DLFloat16 FPUs.