Author
Peng Wang
Bio: Peng Wang is an academic researcher from University of Maryland, College Park. The author has contributed to research in topic(s): Thermoelectric cooling & Thermoelectric effect. The author has an hindex of 15, co-authored 32 publication(s) receiving 798 citation(s).
Papers
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TL;DR: The physical phenomena underpinning the most promising on-chip thermal management approaches for hot spot remediation, along with basic modeling equations and typical results are described in this paper, where attention is devoted to thermoelectric microcoolers.
Abstract: The rapid emergence of nanoelectronics, with the consequent rise in transistor density and switching speed, has led to a steep increase in microprocessor chip heat flux and growing concern over the emergence of on-chip “hot spots”. The application of on-chip high heat flux cooling techniques is today a primary driver for innovation in the electronics industry. In this paper, the physical phenomena underpinning the most promising on-chip thermal management approaches for hot spot remediation, along with basic modeling equations and typical results are described. Attention is devoted to thermoelectric microcoolers — using mini-contcat enhancement and in-plane thermoelectric currents, orthotropic TIM’s/heat spreaders, and phase-change microgap coolers.Copyright © 2009 by ASME
119 citations
TL;DR: In this article, a three-dimensional analytical thermal model of the silicon chip was developed and used to predict the on-chip hot spot cooling performance, and the effects of hot spot size, hot spot heat flux, silicon chip thickness, microcooler size, doping concentration in the silicon, and parasitic Joule heating from electric contact resistance on the cooling of onchip hot spots, were investigated in detail.
Abstract: Thermal management of microprocessors has become an increasing challenge in recent years because of localized high flux hot spots which cannot be effectively removed by conventional cooling techniques. This paper describes the use of the silicon chip itself as a thermoelectric cooler to suppress the hot spot temperature. A three-dimensional analytical thermal model of the silicon chip, including localized thermoelectric cooling, thermoelectric heating, silicon Joule heating, hot spot heating, background heating, and conductive/convective cooling on the back of the silicon chip, is developed and used to predict the on-chip hot spot cooling performance. The effects of hot spot size, hot spot heat flux, silicon chip thickness, microcooler size, doping concentration in the silicon, and parasitic Joule heating from electric contact resistance on the cooling of on-chip hot spots, are investigated in detail.
71 citations
TL;DR: In this article, an analytical thermal model for silicon microcooler, which couples Peltier cooling with heat conduction and heat generation in the silicon substrate, and which includes heat convection and heat generating in the metal lead, is derived and used to study the thermal characteristics of silicon thermoelectric microcoolers.
Abstract: Due to its inherently favorable properties, doped single-crystal silicon has potential application as an on-chip thermoelectric microcooler for advanced integrated circuits. In this paper, an analytical thermal model for silicon microcooler, which couples Peltier cooling with heat conduction and heat generation in the silicon substrate, and which includes heat conduction and heat generation in the metal lead, is derived and used to study the thermal characteristics of silicon thermoelectric microcoolers. The analytical modeling results are shown to be in good agreement with the experimental data and the results from electrothermal numerical simulations. The effects of metal lead, electric contact resistance, silicon doping concentrations, and microcooler sizes on the cooling performance are investigated. The cooling potential of such thermoelectric devices, represented by peak cooling and maximum cooling heat flux on the microcooler surface, is addressed.
67 citations
TL;DR: In this paper, the authors compared single-phase and two-phase cold plates for a specified inverter module, consisting of 12 pairs of silicon insulated gate bipolar transistor (IGBT) devices and diodes.
Abstract: Recent trends including rapid increases in the power ratings and continued miniaturization of semiconductor devices have pushed the heat dissipation of power electronics well beyond the range of conventional thermal management solutions, making control of device temperature a critical issue in the thermal packaging of power electronics. Although evaporative cooling is capable of removing very high heat fluxes, two-phase cold plates have received little attention for cooling power electronics modules. In this work, device-level analytical modeling and system-level thermal simulation are used to examine and compare single-phase and two-phase cold plates for a specified inverter module, consisting of 12 pairs of silicon insulated gate bipolar transistor (IGBT) devices and diodes. For the conditions studied, an R134a-cooled, two-phase cold plate is found to substantially reduce the maximum IGBT temperature and spatial temperature variation, as well as reduce the pumping power and flow rate, in comparison to a conventional single-phase water-cooled cold plate. These results suggest that two-phase cold plates can be used to substantially improve the performance, reliability, and conversion efficiency of power electronics systems.
59 citations
TL;DR: In this paper, the authors describe several cooling techniques, including the application of miniaturized silicon and BiTe thermoelectric coolers and direct cooling with dielectric liquids through thin film evaporation.
Abstract: Driven by the continuing Moore’s Law evolution in chip technology, power dissipation of nanoelectronics chips could exceed 300W, with heat fluxes above 150W/cm2, within the next few years, along with localized, sub-millimeter zones with heat fluxes in excess of 1kW/cm2. New and novel cooling techniques, with the ability to selectively cool sub-millimeter “sun spots” while providing effective global cooling for high heat flux chips are needed. Several promising approaches, including the application of miniaturized silicon and BiTe thermoelectric coolers and direct cooling with dielectric liquids through thin film evaporation, will be described.
54 citations
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TL;DR: This is the first demonstration of viable chip-scale refrigeration technology and has the potential to enable a wide range of currently thermally limited applications.
Abstract: There is a significant need for site-specific and on-demand cooling in electronic, optoelectronic and bioanalytical devices, where cooling is currently achieved by the use of bulky and/or over-designed system-level solutions. Thermoelectric devices can address these limitations while also enabling energy-efficient solutions, and significant progress has been made in the development of nanostructured thermoelectric materials with enhanced figures-of-merit. However, fully functional practical thermoelectric coolers have not been made from these nanomaterials due to the enormous difficulties in integrating nanoscale materials into microscale devices and packaged macroscale systems. Here, we show the integration of thermoelectric coolers fabricated from nanostructured Bi2Te3-based thin-film superlattices into state-of-the-art electronic packages. We report cooling of as much as 15 degrees C at the targeted region on a silicon chip with a high ( approximately 1,300 W cm-2) heat flux. This is the first demonstration of viable chip-scale refrigeration technology and has the potential to enable a wide range of currently thermally limited applications.
625 citations
TL;DR: In this article, a comprehensive review of thermoelectric (TE) technology encompassing the materials, applications, modelling techniques and performance improvement is carried out, including output power conditioning techniques.
Abstract: Thermoelectric (TE) technology is regarded as alternative and environmentally friendly technology for harvesting and recovering heat which is directly converted into electrical energy using thermoelectric generators (TEG). Conversely, Peltier coolers and heaters are utilized to convert electrical energy into heat energy for cooling and heating purposes The main challenge lying behind the TE technology is the low efficiency of these devices mainly due to low figure of merit (ZT) of the materials used in making them as well as improper setting of the TE systems. The objective of this work is to carry out a comprehensive review of TE technology encompassing the materials, applications, modelling techniques and performance improvement. The paper has covered a wide range of topics related to TE technology subject area including the output power conditioning techniques. The review reveals some important critical aspects regarding TE device application and performance improvement. It is observed that the intensified research into TE technology has led to an outstanding increase in ZT, rendering the use TE devices in diversified application a reality. Not only does the TE material research and TE device geometrical adjustment contributed to TE device performance improvement, but also the use of advanced TE mathematical models which have facilitated appropriate segmentation TE modules using different materials and design of integrated TE devices. TE devices are observed to have booming applications in cooling, heating, electric power generation as well as hybrid applications. With the generation of electric energy using TEG, not only does the waste heat provide heat source but also other energy sources like solar, geothermal, biomass, infra-red radiation have gained increased utilization in TE based systems. However, the main challenge remains in striking the balance between the conflicting parameters; ZT and power factor, when designing and optimizing advanced TE materials. Hence more research is necessary to overcome this and other challenge so that the performance TE device can be improved further.
294 citations
TL;DR: In this paper, a discussion of the possible applications of flow boiling in microchannels in order to highlight the challenges in the thermal management for each application is presented. But, several fundamental issues are still not understood and this hinders the transition from laboratory research to commercial applications.
Abstract: The rapid advances in performance and miniaturization of electronics and high power devices resulted in huge heat flux values that need to be dissipated effectively. The average heat flux in computer chips is expected to reach 2–4.5 MW/m2 with local hot spots 12–45 MW/m2 while in IGBT modules, the heat flux at the chip level can reach 6.5–50 MW/m2. Flow boiling in microchannels is one of the most promising cooling methods for these and similar devices due to the capability of achieving very high heat transfer rates with small variations in the surface temperature. However, several fundamental issues are still not understood and this hinders the transition from laboratory research to commercial applications. The present paper starts with a discussion of the possible applications of flow boiling in microchannels in order to highlight the challenges in the thermal management for each application. In this part, the different integrated systems using microchannels were also compared. The comparison demonstrated that miniature cooling systems with a liquid pump were found to be more efficient than miniature vapour compression refrigeration systems. The paper then presents experimental research on flow boiling in single tubes and rectangular multichannels to discuss the following fundamental issues: (1) the definition of microchannel, (2) flow patterns and heat transfer mechanisms, (3) flow instability and reversal and their effect on heat transfer rates, (4) effect of channel surface characteristics and (5) prediction of critical heat flux. Areas where more research is needed were clearly mentioned. In addition, correlations for the prediction of the flow pattern transition boundaries and heat transfer coefficients in small to mini/micro diameter tubes were developed recently by the authors and presented in this paper.
208 citations
25 Sep 2006
TL;DR: In this paper, a review of recent advances in nanoscale thermal and thermoelectric transport with an emphasis on the impact on integrated circuit (IC) thermal management is presented.
Abstract: In this paper we review recent advances in nanoscale thermal and thermoelectric transport with an emphasis on the impact on integrated circuit (IC) thermal management. We will first review thermal conductivity of low-dimensional solids. Experimental results have shown that phonon surface and interface scattering can lower thermal conductivity of silicon thin films and nanowires in the sub-100-nm range by a factor of two to five. Carbon nanotubes are promising candidates as thermal vias and thermal interface materials due to their inherently high thermal conductivities of thousands of W/mK and high mechanical strength. We then concentrate on the fundamental interaction between heat and electricity, i.e., thermoelectric effects, and how nanostructures are used to modify this interaction. We will review recent experimental and theoretical results on superlattice and quantum dot thermoelectrics as well as solid-state thermionic thin-film devices with embedded metallic nanoparticles. Heat and current spreading in the three-dimensional electrode configuration, allow removal of high-power hot spots in IC chips. Several III-V and silicon heterostructure integrated thermionic (HIT) microcoolers have been fabricated and characterized. They have achieved cooling up to 7 degC at 100 degC ambient temperature with devices on the order of 50 mum in diameter. The cooling power density was also characterized using integrated thin-film heaters; values ranging from 100 to 680 W/cm2 were measured. Response time on the order of 20-40 ms has been demonstrated. Calculations show that with an improvement in material properties, hot spots tens of micrometers in diameter with heat fluxes in excess of 1000 W/cm2 could be cooled down by 20 degC-30 degC. Finally we will review some of the more exotic techniques such as thermotunneling and analyze their potential application to chip cooling
205 citations