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Pramod Kumar Tiwari

Researcher at Indian Institute of Technology Patna

Publications -  140
Citations -  1240

Pramod Kumar Tiwari is an academic researcher from Indian Institute of Technology Patna. The author has contributed to research in topics: MOSFET & Subthreshold conduction. The author has an hindex of 18, co-authored 125 publications receiving 968 citations. Previous affiliations of Pramod Kumar Tiwari include Jiwaji University & National Institute of Technology, Rourkela.

Papers
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Journal ArticleDOI

A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

TL;DR: In this paper, a surface potential based threshold voltage model of fully-depleted (FD) recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metaloxide semiconductor field effect transistor (MOSFET) is presented while considering the effects of high-k gate-dielectric material induced fringing field.
Proceedings ArticleDOI

Analytical Modeling of Analog/RF Parameters for Trigate Junctionless Field Effect Transistor Incorporating Substrate Biasing Effects

TL;DR: It is demonstrated that applied substrate voltage can effectively enhance the analog and RF characteristics of TGJLFETs.
Proceedings ArticleDOI

A 2D analytical modeling approach for nanoscale strained-Si (s-Si) on silicon-germanium-on-insulator (SGOI) MOSFETs by evanescent mode analysis

TL;DR: This paper presents a compact two-dimensional analytical model of short-channel strained-Si on SGOI MOSFETs that takes into account the effects of all the device parameters along with Ge mole fraction in the relaxed SiGe layer on the subthreshold device characteristics.
Proceedings ArticleDOI

A Two-Dimensional Subthreshold Current Model of Recessed-Source/Drain (Re-S/D) SOI MOSFETs with High-k Dielectric

TL;DR: In this paper, an analytical surfacepotential based sub threshold current model for short-channel recessed-source/ drain (Re-S/D) SOI MOSFETs with high-k dielectric is presented.
Journal ArticleDOI

Investigation of the Electrical Properties of Double-Gate Dual-Active-Layer (DG-DAL) Thin-Film Transistor (TFT) with HfO2|La2O3|HfO2 (HLH) Sandwich Gate Dielectrics

TL;DR: In this paper, the electrical properties of a double-gate dual-active-layer (DG-DAL) thin-film transistor (TFT) are investigated, where the conventional gate oxide material (silicon dioxide, SiO2) is replaced with a tri-high-k gate dielectric layer, hafnium dioxide (HfO2)/lanthanum oxide (La2O3)/hafnium dioxide(Hf O2)—(HLH).