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R.P. Dunne
Researcher at IBM
Publications - 6
Citations - 730
R.P. Dunne is an academic researcher from IBM. The author has contributed to research in topics: Inductive coupling & Inductance. The author has an hindex of 6, co-authored 6 publications receiving 723 citations.
Papers
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Journal ArticleDOI
When are transmission-line effects important for on-chip interconnections?
Alina Deutsch,Gerard V. Kopcsay,Phillip J. Restle,Howard H. Smith,George A. Katopis,Wiren D. Becker,Paul W. Coteus,C.W. Surovic,Barry J. Rubin,R.P. Dunne,T. Gallo,Keith A. Jenkins,L.M. Terman,Robert H. Dennard,George Anthony Sai-Halasz,Byron L. Krauter,D.R. Knebel +16 more
TL;DR: In this paper, the authors analyzed short, medium, and long on-chip interconnections having linewidths of 0.45-52 /spl mu/m in a five-metal-layer structure.
Journal ArticleDOI
Modeling and characterization of long on-chip interconnections for high-performance microprocessors
Alina Deutsch,G.V. Kopcsay,Barry J. Rubin,C.W. Surovic,L.M. Terman,R.P. Dunne,T. Gallo,R.H. Dennard +7 more
Proceedings ArticleDOI
When are transmission-line effects important for on-chip interconnections
Alina Deutsch,G.V. Kopcsay,Phillip J. Restle,George A. Katopis,Wiren D. Becker,Howard H. Smith,Paul W. Coteus,C.W. Surovic,Barry J. Rubin,R.P. Dunne,T. Gallo,Keith A. Jenkins,L.M. Terman,Robert H. Dennard,George Anthony Sai-Halasz,D.R. Knebel +15 more
TL;DR: In this article, the authors analyzed short, medium and long on-chip interconnections having line widths of 0.45-52 /spl mu/m in a five-metal-layer structure and proposed design guidelines and technology changes to achieve minimum delay and contain crosstalk for local and global wiring.
Proceedings ArticleDOI
The importance of inductance and inductive coupling for on-chip wiring
Alina Deutsch,Howard H. Smith,George A. Katopis,Wiren D. Becker,Paul W. Coteus,C.W. Surovic,G.V. Kopcsay,Barry J. Rubin,R.P. Dunne,T. Gallo,D.R. Knebel,Byron L. Krauter,L.M. Terman,George Anthony Sai-Halasz,P.J. Reslte +14 more
TL;DR: In this article, the importance of inductance and inductive coupling for accurate delay and crosstalk prediction in on-chip interconnections is investigated experimentally for the top three layers in a five-layer wiring structure and guidelines are formulated.
Proceedings ArticleDOI
Design guidelines for short, medium, and long on-chip interconnections
Alina Deutsch,Wiren D. Becker,George A. Katopis,Howard H. Smith,Phillip J. Restle,Paul W. Coteus,C.W. Surovic,G.V. Kopcsay,Barry J. Rubin,R.P. Dunne,T. Gallo,Keith A. Jenkins,L.M. Terman,R.H. Dennard,Daniel R. Knebel +14 more