R
R. Williams
Researcher at Motorola
Publications - 7
Citations - 334
R. Williams is an academic researcher from Motorola. The author has contributed to research in topics: Magnetoresistive random-access memory & Bit cell. The author has an hindex of 5, co-authored 7 publications receiving 328 citations.
Papers
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Journal ArticleDOI
A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
M. Durlam,P.J. Naji,A. Omair,M. DeHerrera,J. Calder,Jon M. Slaughter,B.N. Engel,Nicholas D. Rizzo,Gregory W. Grynkewich,Brian R. Butcher,Clarence J. Tracy,K. Smith,Kelly W. Kyler,J. Ren,J. Molla,W.A. Feil,R. Williams,Saied N. Tehrani +17 more
TL;DR: In this paper, a low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated.
Proceedings ArticleDOI
A low power 1 Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
M. Durlam,Peter K. Naji,A. Omair,M. DeHerrera,J. Calder,Jon M. Slaughter,Bradley N. Engel,Nicholas D. Rizzo,Gregory W. Grynkewich,Brian R. Butcher,Clarence J. Tracy,K. Smith,Kelly W. Kyler,J. Ren,J. Molla,B. Feil,R. Williams,Saied N. Tehrani +17 more
TL;DR: In this article, a low power 1 Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated.
Proceedings ArticleDOI
A 0.18 /spl mu/m 4Mb toggling MRAM
M. Durlam,D. Addie,Johan Åkerman,Brian R. Butcher,P. Brown,J. Chan,M. DeHerrera,B.N. Engel,B. Feil,Gregory W. Grynkewich,J. Janesky,M. Johnson,Kelly W. Kyler,J. Molla,J. Martin,K. Nagel,J. Ren,Nicholas D. Rizzo,T. Rodriguez,L. Savtchenko,J. Salter,Jon M. Slaughter,K. Smith,J. J. Sun,M. Lien,K. Papworth,P. Shah,W. Qin,R. Williams,L. Wise,Saied N. Tehrani +30 more
TL;DR: In this paper, a low power 4Mb magnetoresistive random access memory (MRAM) with a new magnetic switching mode is presented for the first time, which is based on a 1-Transistor 1-Magnetic Tunnel Junction (1TIMTJ) bit cell.
Proceedings ArticleDOI
90nm toggle MRAM array with 0.29/spl mu/m/sup 2/ cells
Mark A. Durlam,Thomas W. Andre,P. Brown,J. Calder,J. Chan,R. Cuppens,Renu W. Dave,T. Ditewig,Mark F. Deherrera,B.N. Engel,B. Feil,C. Frey,D. Galpin,Bradley J. Garni,G. Grynkewich,Jason Allen Janesky,Gloria Kerszykowski,M. Lien,J. Martin,Joseph J. Nahas,K. Nagel,K. Smith,Chitra K. Subramanian,J. J. Sun,J. Tamim,R. Williams,L. Wise,S. Zoll,F. List,R. Fournel,B. Martino,Saied N. Tehrani +31 more
TL;DR: A 90nm magnetoresistive random access memory (MRAM) based on the toggle switching mode has been successfully demonstrated for the first time in a 90nm CMOS process to demonstrate scalability of MRAM to 90nm technology.
Proceedings ArticleDOI
A 0.18 /spl mu/m 4 Mbit toggling MRAM
M. Durlam,D. Addie,Johan Åkerman,Brian R. Butcher,P. Brown,J. Chan,M. DeHerrera,B.N. Engel,B. Feil,Gregory W. Grynkewich,J. Janesky,M. Johnson,Kelly W. Kyler,J. Molla,J. Martin,K. Nagel,Joseph J. Nahas,J. Ren,Nicholas D. Rizzo,T. Rodriguez,L. Savtchenko,J. Salter,J.M. Slaughter,K. Smith,J. J. Sun,M. Lien,K. Papworth,P. Shah,W. Qin,R. Williams,L. Wise,Saied N. Tehrani +31 more
TL;DR: In this article, a 4 Mbit magnetoresistive random access memory (MRAM) with a new magnetic switching mode is described, based on a 1-Transistor 1-Magnetic Tunnel Junction (1T1MTJ) bit cell.