The surface science of titanium dioxide

Polarity discontinuities at the interfaces between different crystalline materials (heterointerfaces) can lead to nontrivial local atomic and electronic structure, owing to the presence of dangling bonds and incomplete atomic coordinations. These discontinuities often arise in naturally layered oxide structures, such as the superconducting copper oxides and ferroelectric titanates, as well as in artificial thin film oxide heterostructures such as manganite tunnel junctions. If polarity discontinuities can be atomically controlled, unusual charge states that are inaccessible in bulk materials could be realized. Here we have examined a model interface between two insulating perovskite oxides--LaAlO3 and SrTiO3--in which we control the termination layer at the interface on an atomic scale. In the simple ionic limit, this interface presents an extra half electron or hole per two-dimensional unit cell, depending on the structure of the interface. The hole-doped interface is found to be insulating, whereas the electron-doped interface is conducting, with extremely high carrier mobility exceeding 10,000 cm2 V(-1) s(-1). At low temperature, dramatic magnetoresistance oscillations periodic with the inverse magnetic field are observed, indicating quantum transport. These results present a broad opportunity to tailor low-dimensional charge states by atomically engineered oxide heteroepitaxy.

A high-mobility electron gas at the LaAlO3/SrTiO3 heterointerface

Electron and ambipolar transport in organic field-effect transistors.

Since the successful demonstration of a blue light-emitting diode (LED)1, potential materials for making short-wavelength LEDs and diode lasers have been attracting increasing interest as the demands for display, illumination and information storage grow2,3,4. Zinc oxide has substantial advantages including large exciton binding energy, as demonstrated by efficient excitonic lasing on optical excitation5,6. Several groups have postulated the use of p-type ZnO doped with nitrogen, arsenic or phosphorus7,8,9,10, and even p–n junctions11,12,13. However, the choice of dopant and growth technique remains controversial and the reliability of p-type ZnO is still under debate14. If ZnO is ever to produce long-lasting and robust devices, the quality of epitaxial layers has to be improved as has been the protocol in other compound semiconductors15. Here we report high-quality undoped films with electron mobility exceeding that in the bulk. We have used a new technique to fabricate p-type ZnO reproducibly. Violet electroluminescence from homostructural p–i–n junctions is demonstrated at room-temperature.

Repeated temperature modulation epitaxy for p-type doping and light-emitting diode based on ZnO

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The atomically smooth SrTiO3 (100) with steps one unit cell in height was obtained by treating the crystal surface with a pH-controlled NH4F-HF solution. The homoepitaxy of SrTiO3 film on the crystal surface proceeds in a perfect layer-by-layer mode as verified by reflection high-energy electron diffraction and atomic force microscopy. Ion scattering spectroscopy revealed that the TiO2 atomic plane terminated the as-treated clean surface and that the terminating atomic layer could be tuned to the SrO atomic plane by homooepitaxial growth. This technology provides a well-defined substrate surface for atomically regulated epitaxial growth of such perovskite oxide films as YBa2Cu3O7-δ.

https://science.sciencemag.org/content/sci/266/5190/1540.full.pdf

Atomic Control of the SrTiO3 Crystal Surface

We demonstrate a new MOSFET on ultra-thin BOX that allows wide-range back-bias control in low-power and high-performance applications. The back gate is effective not only to increase the drive current by about 20% in active mode but also in reduce the off-current by an order of magnitude in stand-by mode. We have also demonstrated tunable-threshold-voltage technology for devices with metal gates and ion implantation for V/sub th/ control. The target V/sub th/ for low-power applications was achieved by using ion implantation for V/sub th/ control. We propose a 6-transistor SRAM memory cell in which we obtain even more benefit from the new device structure by adding a feedback mechanism. A proposed 6-Tr SRAM memory cell is shown to dramatically improve SNM characteristics at the 65-nm technology nodes, and this effect will also apply at finer nodes.

Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control

We have developed the new "Yin-Yang" feedback technology for SRAM cells. This technology is applied to six-transistor cells and four-transistor cells, which are composed of transistors with the new D2G-SOI structure. At the 65-nm process node, these cells can operate at 0.7 V in mass-produced LSIs under real usage conditions. Max operating speeds are 300 MHz for the six-transistor and 200 MHz for the four-transistor cell. Leakage current of the four-transistor cell is about 1/1000 that of a conventional four-transistor cell. These cells provide a SRAM menu that allows us to optimally balance the requirements of various types of SRAM in low-power LSIs.

Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology

The silicon on thin buried oxide (SOTB) has the smallest V th variation among planar CMOS due to a low-dose channel. This study focuses on evaluating local variability components and searching for the dominant factor after reducing random-dopant fluctuation (RDF) by decreasing impurities in the channel. Improving short-channel-effect immunity is important to reduce both the global and local variations. The local V th variation A Vt was very small, ~ 1.0 and 0.7 mV·?m for NMOS and PMOS, respectively; however, additional unknown factors other than RDF still exist. Silicon-on-insulator thickness variation does not play a major role in ?V th , and the SOTB is scalable to less than 25 nm while maintaining small variability and, hence, low power consumption. The larger variability in NMOS compared to that in PMOS cannot be explained by conventional RDF but seems to be strongly related to channel doping.

Local $V_{\rm th}$ Variability and Scalability in Silicon-on-Thin-BOX (SOTB) CMOS With Small Random-Dopant Fluctuation

To provide a semiconductor device having a thin-film BOX-SOI structure and capable of realizing a high-speed operation of a logic circuit and a stable operation of a memory circuit. A semiconductor device according to the present invention includes a semiconductor support substrate, an insulation layer having a thickness of at mast 10 nm, and a semiconductor layer. In an upper surface of the semiconductor layer, a first field-effect transistor including a first gate electrode and constituting a logic circuit is formed. Further, in the upper surface of the semiconductor layer, a second field-effect transistor including a second gate electrode and constituting a memory circuit is formed. At least three well regions having different conductivity types are formed in the semiconductor support substrate. In the presence of the well regions, a region of the semiconductor support substrate below the first gate electrode and a region of the semiconductor support substrate below the second gate electrode are electrically separated from each other.

Ryuta Tsuchiya

Papers

Atomic Control of the SrTiO3 Crystal Surface

Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control

Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology

Local $V_{\rm th}$ Variability and Scalability in Silicon-on-Thin-BOX (SOTB) CMOS With Small Random-Dopant Fluctuation

Semiconductor device and method for controlling semiconductor device