High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

Potential threats caused by something like real fingers, which are called fake or artificial fingers, should be crucial for authentication based on fingerprint systems. Security evaluation against attacks using such artificial fingers has been rarely disclosed. Only in patent literature, measures, such as live and well detection, against fake fingers have been proposed. However, the providers of fingerprint systems usually do not mention whether or not these measures are actually implemented in emerging fingerprint systems for PCs or smart cards or portable terminals, which are expected to enhance the grade of personal authentication necessary for digital transactions. As researchers who are pursuing secure systems, we would like to discuss attacks using artificial fingers and conduct experimental research to clarify the reality. This paper reports that gummy fingers, namely artificial fingers that are easily made of cheap and readily available gelatin, were accepted by extremely high rates by 11 particular fingerprint devices with optical or capacitive sensors. We have used the molds, which we made by pressing our live fingers against them or by processing fingerprint images from prints on glass surfaces, etc. We describe how to make the molds, and then show that the gummy fingers, which are made with these molds, can fool the fingerprint devices.

Impact of Artificial "Gummy" Fingers on Fingerprint Systems.

This paper investigates the effect of lowering the supply and threshold voltages on the energy efficiency of CMOS circuits. Using a first-order model of the energy and delay of a CMOS circuit, we show that lowering the supply and threshold voltage is generally advantageous, especially when the transistors are velocity saturated and the nodes have a high activity factor, In fact, for modern submicron technologies, this simple analysis suggests optimal energy efficiency at supply voltages under 0.5 V. Other process and circuit parameters have almost no effect on this optimal operating point. If there is some uncertainty in the value of the threshold or supply voltage, however, the power advantage of this very low voltage operation diminishes. Therefore, unless active feedback is used to control the uncertainty, in the future the supply and threshold voltage will not decrease drastically, but rather will continue to scale down to maintain constant electric fields.

/pdf/supply-and-threshold-voltage-scaling-for-low-power-cmos-2zwloxdyu4.pdf

Supply and threshold voltage scaling for low power CMOS

An electronic device with a display and a fingerprint sensor may authenticate a user for a respective function. While a respective function of the device is in a locked state, the device displays a graphical element on the display, the graphical element indicating a first direction of finger movement that enables unlocking of the respective function. While displaying the graphical element, the device detects an input that includes movement of a finger in the first direction over the fingerprint sensor and determines whether the input meets unlock criteria based at least in part on fingerprint information of the finger detected by the fingerprint sensor during the input. In accordance with a determination that the input meets the unlock criteria, the device unlocks the respective function; and in accordance with a determination that the input does not meet the unlock criteria, the device maintains the respective function in the locked state.

Embedded authentication systems in an electronic device

A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also causes increased leakage energy drain by lengthening the interval over which a computation is carried out. Therefore, for minimization of the total energy, one needs to determine an operating point, called the critical speed. We compute processor slowdown factors based on the critical speed for energy minimization. Procrastination scheduling attempts to maximize the duration of idle intervals by keeping the processor in a sleep/shutdown state even if there are pending tasks, within the constraints imposed by performance requirements. Our simulation experiments show that the critical speed slowdown results in up to 5% energy gains over a leakage oblivious dynamic voltage scaling. Procrastination scheduling scheme extends the sleep intervals to up to 5 times, resulting in up to an additional 18% energy gains, while meeting all timing requirements.

Leakage aware dynamic voltage scaling for real-time embedded systems

1-V power supply high-speed low-power digital circuit technology with 0.5-/spl mu/m multithreshold-voltage CMOS (MTCMOS) is proposed. This technology features both low-threshold voltage and high-threshold voltage MOSFET's in a single LSI. The low-threshold voltage MOSFET's enhance speed performance at a low supply voltage of 1 V or less, while the high-threshold voltage MOSFET's suppress the stand-by leakage current during the sleep period. This technology has brought about logic gate characteristics of a 1.7-ns propagation delay time and 0.3-/spl mu/W/MHz/gate power dissipation with a standard load. In addition, an MTCMOS standard cell library has been developed so that conventional CAD tools can be used to lay out low-voltage LSI's. To demonstrate MTCMOS's effectiveness, a PLL LSI based on standard cells was designed as a carrying vehicle. 18-MHz operation at 1 V was achieved using a 0.5-/spl mu/m CMOS process. >

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS

This paper proposes a new multithreshold-voltage CMOS circuit (MTCMOS) concept aimed at achieving high-speed, ultralow-power large-scale integrators (LSI's) for battery-driven portable equipment. The "balloon" circuit scheme based on this concept preserves data during the power-down period in which the power supply to the circuit is cut off in order to reduce the standby power. Low-power, high-speed performance is achieved by the small preserving circuit which can be separated from the critical path of the logic circuit. This preserving circuit is not only three times faster than a conventional MTCMOS one, but it consumes half the power and takes up half the area. Using this scheme for an LSI chip, 20-MHz operation at 1.0 V and only a few nA standby current was achieved with 0.5-/spl mu/m CMOS technology. Moreover, this scheme is effective for high speed and low-power operation in quarter-micrometer and finer devices.

A 1-V high-speed MTCMOS circuit scheme for power-down application circuits

An authentication token includes a personal collation unit and communication unit. The personal collation unit includes a sensor, storage unit, and collation unit. The sensor detects biometrical information of a user and outputs the detection result as sensing data. The storage unit stores in advance registered data to be collated with the biometrical information of the user. The collation unit collates the registered data with the sensing data and outputs the collation result as authentication data. The communication unit transmits the authentication data from the personal collation unit to the use device as communication data. The personal collation unit and communication unit are integrated.

Authentication token and authentication system

We propose a mobile-DBA with low-latency for a TDM-PON based mobile fronthaul. It utilizes mobile-scheduling information and reduces the latency to about 1/20 of conventional one. Measured latencies (< 50 µs) are enough for LTE.

A novel DBA scheme for TDM-PON based mobile fronthaul

A chip architecture that integrates a fingerprint sensor and an identifier in a single chip is proposed. The fingerprint identifier is formed by an array of pixels, and each pixel contains a sensing element and a processing element. The sensing element senses capacitances formed by a finger surface to capture a fingerprint image. An identification is performed by the pixel-parallel processing of the pixels. The sensing element is built above the processing element in each pixel. The chip architecture realizes a wide-area sensor without a large increase of chip size and ensures high sensor sensitivity while maintaining a high image density. The sensing element is covered with a hard film to prevent physical and chemical degradation and surrounded by a ground wall to shield it. The wall is also exposed on the chip surface to protect against damage by electrostatic discharges from the finger contacting the chip. A 15/spl times/15 mm/sup 2/ single-chip fingerprint sensor/identifier LSI was fabricated using 0.5-/spl mu/m standard CMOS with the sensor process. The sensor area is 10.1/spl times/13.5 mm/sup 2/. The sensing and identification time is 102 ms with power consumption of 8.8 mW at 3.3 V. Five hundred tests confirmed a stranger-rejection rate of the chip of more than 99% and a user-rejection rate of less than 1%.

/pdf/a-single-chip-fingerprint-sensor-and-identifier-1s0ar6sp4h.pdf

Satoshi Shigematsu

Papers

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS

A 1-V high-speed MTCMOS circuit scheme for power-down application circuits

Authentication token and authentication system

A novel DBA scheme for TDM-PON based mobile fronthaul

A single-chip fingerprint sensor and identifier