Shyh-Wei Wang

TL;DR: In this paper, a new method of extracting the MOSFET series resistance is proposed, which requires only simple dc measurements on a single test device, without requiring quantities such as gate-oxide thickness, physical gate length, or effective channel length.

TL;DR: Capacitance-voltage curves revert to essentially classical shape revealing mobile carrier response in accumulation and depletion, hole inversion is observed, and predicted minority carrier response frequency in the hundred kHz range is experimentally confirmed; reference samples using conventional techniques show a trap dominated capacitance response as mentioned in this paper.

TL;DR: In this paper, the first InAs FinFETs with fin width in the range 25-35 nm, formed by inductively coupled plasma etching, were presented, where the fin width was controlled by the use of an etch stop layer incorporated into the heterostructure.

TL;DR: In this article, a method of series resistance extraction for MOSFETs is proposed, which relies on the constant mobility criteria, while for different gate lengths, it preserves the shape of universal mobility curves in the high-vertical-field regime.

TL;DR: In this article, a single-poly EEPROM using damascene control gate (CG) structure is presented, which can perform the program and erase function with a voltage less than 6.5 V.