In this chapter, we will restrict our attention to the ferrites and a few other closely related materials. The great interest in ferrites stems from their unique combination of a spontaneous magnetization and a high electrical resistivity. The observed magnetization results from the difference in the magnetizations of two non-equivalent sub-lattices of the magnetic ions in the crystal structure. Materials of this type should strictly be designated as “ferrimagnetic” and in some respects are more closely related to anti-ferromagnetic substances than they are to ferromagnetics in which the magnetization results from the parallel alignment of all the magnetic moments present. We shall not adhere to this special nomenclature except to emphasize effects, which are due to the existence of the sub-lattices.

Ferromagnetic materials

Industrial Product-Service Systems—IPS2

The outstanding properties of SiO2, which include high resistivity, excellent dielectric strength, a large band gap, a high melting point, and a native, low defect density interface with Si, are in large part responsible for enabling the microelectronics revolution. The Si/SiO2 interface, which forms the heart of the modern metal–oxide–semiconductor field effect transistor, the building block of the integrated circuit, is arguably the worlds most economically and technologically important materials interface. This article summarizes recent progress and current scientific understanding of ultrathin (<4 nm) SiO2 and Si–O–N (silicon oxynitride) gate dielectrics on Si based devices. We will emphasize an understanding of the limits of these gate dielectrics, i.e., how their continuously shrinking thickness, dictated by integrated circuit device scaling, results in physical and electrical property changes that impose limits on their usefulness. We observe, in conclusion, that although Si microelectronic devices...

Ultrathin (<4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

The aim of this paper is to give a thorough overview of flash memory cells. Basic operations and charge-injection mechanisms that are most commonly used in actual flash memory cells are reviewed to provide an understanding of the underlying physics and principles in order to appreciate the large number of device structures, processing technologies, and circuit designs presented in the literature. New cell structures and architectural solutions have been surveyed to highlight the evolution of the flash memory technology, oriented to both reducing cell size and upgrading product functions. The subject is of extreme interest: new concepts involving new materials, structures, principles, or applications are being continuously introduced. The worldwide semiconductor memory market seems ready to accept many new applications in fields that are not specific to traditional nonvolatile memories.

Flash memory cells-an overview

Web Service Level Agreement (WSLA) Language Specification

We have studied the kinetics and mechanism of oxidation of SiGe alloys deposited epitaxially onto Si substrates by low‐temperature chemical vapor deposition. Ge is shown to enhance oxidation rates by a factor of about 3 in the linear regime, and to be completely rejected from the oxide so that it piles up at the SiO2/SiGe interface. We demonstrate that Ge plays a purely catalytic role, i.e., it enhances the reaction rate while remaining unchanged itself. Electrical properties of the oxides formed under these conditions are presented, as well as microstructures of the oxide/substrate, Ge‐enriched/SiGe substrate, and SiGe/Si substrate interfaces, and x‐ray photoemission studies of the early stages of oxidation. Possible mechanisms are discussed and compared with oxidation of pure silicon.

Oxidation studies of SiGe

Very thin thermal oxides are shown to exhibit a failure mode that is undetected by conventional breakdown tests. This failure mode appears in the form of excessive leakage current at low field and is induced by high-field stresses. The stress-induced oxide leakage is permanent and stable with time and thermal annealing. It becomes the dominant failure mode of thin oxides because it always precedes destructive breakdown. Experimental results and theoretical calculations show that the leakage current is not caused by positive charge generation and accumulation in the oxide. It is proposed that the oxide leakage originates from localized defect-related weak spots where the insulator has experienced significant deterioration from electrical stress. The leakage conduction mechanism appears to be thermally assisted tunneling through the locally reduced injection barrier, and the model seems to be consistent with both I-V measurements at temperatures from 77 K to 250 degrees C and theoretical calculations. >

High-field-induced degradation in ultra-thin SiO/sub 2/ films

We report the first preparation of in situ boron‐doped epilayers by a low‐temperature chemical vapor deposition process (T=550 °C). Boron incorporation is approximately linear in source gas concentration, and active levels of boron incorporation exceeding 1×1020 B/cm3 have been achieved in as‐deposited 550 °C epilayers. This value exceeds solid solubility limits for boron in silicon at these temperatures by two orders of magnitude, and highlights the nonequilibrium nature of this process. High resolution transmission electron microscopy lattice imaging of this material shows it to be free of boron precipitates, while both plane view transmission electron microscopy and x‐ray topography fail to reveal extended defects. Utilizing low‐temperature processing throughout, p/n junctions have been fabricated in several of the in situ doped layers, with essentially ideal junction quality factors (n=1.0 –1.05) found for junctions of 1×106 μm2.

Nonequilibrium boron doping effects in low‐temperature epitaxial silicon films

In most commercial electronic contract management applications available today, different customized code base has to be developed, deployed and operated to support each tenant. Few advanced commercial electronic contract management applications use a single code base with configuration options to support multi-tenants. However, a separate instance of the code base still has to be deployed and operated for each tenant even in these applications. The business model of having to support a single application instance for each tenant makes an electronic contract management application and other critical business applications out of reach for most small and medium businesses (SMBs), in particular, the very small businesses (SVBs) because of its high development and maintenance cost. Recently, a new business model of a single application instance supporting multi-tenancy based on software as a service (SaaS) has emerged making expensive business applications more affordable for SMBs and SVBs for multi-tenancy [1]. In this paper, we present the first of a kind multi-tenancy SaaS electronic contract management application. We also describe several novel methods used in the metadata, security and shared services, as well as customization and tenant extensions modules to support multi-tenancy SaaS in this application. This multi-tenancy SaaS application has shown to benefit both the application service providers as well as their tenants. This new multi-tenancy SaaS model can reduce the application hosting cost and make the application more affordable to the tenants because of its capabilities in customization and scalability while continuing to support an increasing number of tenants. It furthers benefits tenants by saving their money and time with immediate access to the latest IT innovations and infrastructure improvements on a single application code base. Most end users of tenants have found their productivities increased, the contract transaction time accelerated, contractual errors reduced in using this multi-tenancy SaaS electronic contract management application as demonstrated in several ongoing IBM pilot programs serving more than ten tenants with over 3000 end users.

A Software as a Service with Multi-tenancy Support for an Electronic Contract Management Application

The authors present a high-quality dielectric system for use with Si/sub 1-x/Ge/sub x/ alloys. The system employs plasma-enhanced chemical vapor deposited (PECVD) SiO/sub 2/ on a thin (6-8-nm) layer of pure silicon grown epitaxially on the Si/sub 1-x/Ge/sub x/ layer. The buffer layer and the deposited oxide prevent the accumulation of Ge at the oxide-semiconductor interface and thus keep the interface state density within acceptable limits. The Si cap layer leads to a sequential turn-on of the Si/sub 1-x/Ge/sub x/ channel and the Si cap channel as is clearly observed in the low-temperature C-V curves. The authors show that this dual-channel structure can be designed to suppress the parasitic Si cap channel. The MOS capacitors are also used to extract valence-band offsets. >

Thao N. Nguyen

Papers

Oxidation studies of SiGe

High-field-induced degradation in ultra-thin SiO/sub 2/ films

Nonequilibrium boron doping effects in low‐temperature epitaxial silicon films

A Software as a Service with Multi-tenancy Support for an Electronic Contract Management Application

A gate-quality dielectric system for SiGe metal-oxide-semiconductor devices