From the Publisher: 
The accessible presentation of this book gives both a general view of the entire computer vision enterprise and also offers sufficient detail to be able to build useful applications. Users learn techniques that have proven to be useful by first-hand experience and a wide range of mathematical methods. A CD-ROM with every copy of the text contains source code for programming practice, color images, and illustrative movies. Comprehensive and up-to-date, this book includes essential topics that either reflect practical significance or are of theoretical importance. Topics are discussed in substantial and increasing depth. Application surveys describe numerous important application areas such as image based rendering and digital libraries. Many important algorithms broken down and illustrated in pseudo code. Appropriate for use by engineers as a comprehensive reference to the computer vision enterprise.

Computer vision : a modern approach = 计算机视觉 : 一种现代的方法

An overview of the self-organizing map algorithm, on which the papers in this issue are based, is presented in this article.

The Self-Organizing Map

Fast Fourier Transform

Computer algebra systems are now ubiquitous in all areas of science and engineering. This highly successful textbook, widely regarded as the “bible of computer algebra”, gives a thorough introduction to the algorithmic basis of the mathematical engine in computer algebra systems. Designed to accompany oneor two-semester courses for advanced undergraduate or graduate students in computer science or mathematics, its comprehensiveness and reliability has also made it an essential reference for professionals in the area. Special features include: detailed study of algorithms including time analysis; implementation reports on several topics; complete proofs of the mathematical underpinnings; and a wide variety of applications (among others, in chemistry, coding theory, cryptography, computational logic, and the design of calendars and musical scales). A great deal of historical information and illustration enlivens the text. In this third edition, errors have been corrected and much of the Fast Euclidean Algorithm chapter has been renovated.

Modern computer algebra

The Artificial Intelligence field continues to be plagued by what can only be described as ‘bold promises for the future syndrome’, often perpetrated by researchers who should know better. While impartial assessment can point to concrete contributions over the past 50 years (such as automated theorem proving, games strategies, the LISP and Prolog high-level computer languages, Automatic Speech Recognition, Natural Language Processing, mobile robot path planning, unmanned vehicles, humanoid robots, data mining, and more), the more cynical argue that AI has witnessed more than its fair share of ‘unmitigated disasters’ during this time – see, for example [3,58,107,125,186]. The general public becomes rapidly jaded with such ‘bold predictions’ that fail to live up to their original hype, and which ultimately render the zealots’ promises as counter-productive.

Computational Intelligence: An Introduction

A mixed mode digital/analog special purpose VLSI hardware implementation of an associative memory with neural architecture is presented. The memory concept is based on a n/spl times/m matrix architecture with binary storage elements holding the connection weights. To enhance the processing speed analog circuit techniques are applied to implement the algorithm for the association. Although analog circuits suffer from device mismatch a moderate precision of the circuit is acceptable since for the given associative memory model only few parts of the circuit participate on the performed information processing steps. Thus, the information processing elements can be integrated very densely on one chip and hence large scale integration with a large number of connection weights is feasible.

Mixed mode VLSI implementation of a neural associative memory

Acceleratorboard for Neural Associative Memories

Advances in Autonomous Mini Robots

MPSoCs with hierarchical communication infrastructures are promising architectures for low power embedded systems. Multiple CPU clusters are coupled using an Network-on-Chip (NoC). Our CoreVA-MPSoC targets streaming applications in embedded systems, like signal and video processing. In this work we introduce a tightly coupled shared data memory to each CPU cluster, which can be accessed by all CPUs of a cluster and the NoC with low latency. The main focus is the comparison of different memory architectures and their connection to the NoC. We analyze memory architectures with local data memory only, shared data memory only, and a hybrid architecture integrating both. Implementation results are presented for a 28 nm FD-SOI standard cell technology. A CPU cluster with shared memory shows similar area requirements compared to the local memory architecture. We use post place and route simulations for precise analysis of energy consumption on both cluster and NoC level using the different memory architectures. An architecture with shared data memory shows best performance results in combination with a high resource efficiency. On average, the use of shared memory shows a 17.2 percent higher throughput for a benchmark suite of 10 applications compared to the use of local memory only.

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CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories

This paper describes the Teleworkbench system, a teleoperated platform for managing experiments in multi-robotics. This testbed is intended as a benchmark tool for managing and analyzing experiments involving one or many minirobots. The Teleworkbench is connected to the internet to allow easy access for remote users located in any part of the world. Three unique features of our testbed are the ability to download a user-defined program for each robot, the support for running 36 robots simultaneously, and the visualization of occurring events during the experiments.

Ulrich Rückert

Papers

Mixed mode VLSI implementation of a neural associative memory

Acceleratorboard for Neural Associative Memories

Advances in Autonomous Mini Robots

CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories

Teleworkbench: A Teleoperated Platform for Multi-Robot Experiments