From the Publisher: 
The accessible presentation of this book gives both a general view of the entire computer vision enterprise and also offers sufficient detail to be able to build useful applications. Users learn techniques that have proven to be useful by first-hand experience and a wide range of mathematical methods. A CD-ROM with every copy of the text contains source code for programming practice, color images, and illustrative movies. Comprehensive and up-to-date, this book includes essential topics that either reflect practical significance or are of theoretical importance. Topics are discussed in substantial and increasing depth. Application surveys describe numerous important application areas such as image based rendering and digital libraries. Many important algorithms broken down and illustrated in pseudo code. Appropriate for use by engineers as a comprehensive reference to the computer vision enterprise.

Computer vision : a modern approach = 计算机视觉 : 一种现代的方法

An overview of the self-organizing map algorithm, on which the papers in this issue are based, is presented in this article.

The Self-Organizing Map

Fast Fourier Transform

Computer algebra systems are now ubiquitous in all areas of science and engineering. This highly successful textbook, widely regarded as the “bible of computer algebra”, gives a thorough introduction to the algorithmic basis of the mathematical engine in computer algebra systems. Designed to accompany oneor two-semester courses for advanced undergraduate or graduate students in computer science or mathematics, its comprehensiveness and reliability has also made it an essential reference for professionals in the area. Special features include: detailed study of algorithms including time analysis; implementation reports on several topics; complete proofs of the mathematical underpinnings; and a wide variety of applications (among others, in chemistry, coding theory, cryptography, computational logic, and the design of calendars and musical scales). A great deal of historical information and illustration enlivens the text. In this third edition, errors have been corrected and much of the Fast Euclidean Algorithm chapter has been renovated.

Modern computer algebra

The Artificial Intelligence field continues to be plagued by what can only be described as ‘bold promises for the future syndrome’, often perpetrated by researchers who should know better. While impartial assessment can point to concrete contributions over the past 50 years (such as automated theorem proving, games strategies, the LISP and Prolog high-level computer languages, Automatic Speech Recognition, Natural Language Processing, mobile robot path planning, unmanned vehicles, humanoid robots, data mining, and more), the more cynical argue that AI has witnessed more than its fair share of ‘unmitigated disasters’ during this time – see, for example [3,58,107,125,186]. The general public becomes rapidly jaded with such ‘bold predictions’ that fail to live up to their original hype, and which ultimately render the zealots’ promises as counter-productive.

Computational Intelligence: An Introduction

The local cluster (LC) artificial neural net architecture performs as well as the radial basis functions networks as a computational method for multidimensional function approximation. The LC network combines sigmoidal neurones in clusters that have localised response in input space. This construction gives the LC nets additional flexibility over RBF nets and makes them more VLSl friendly. We investigate the computational abilities of two versions of the LC architecture and confirm the feasibility of an analog implementation by showing a circuit design verified by SPICE simulation.

A VLSI friendly neural network with localised transfer functions

Performance evaluation is an important step for designing embedded applications that require small footprints, low energy consumption and high throughput. We present a simulation-based method to characterize several resource properties (memory accesses, energy consumption, execution time) of embedded software that runs on dedicated processing engines targeted for SoC designs. The results of the characterization process are back-annotated to the source code to aid the designer in optimizing the implementation. Our approach allows the replacement of software parts by hardware units to speed up processing. We have performed case studies with software and hardware implementations of a pseudo-random number generator and a transmission error detector. The results show that computation speed-ups and energy reductions up to a factor of 15 can be obtained with implementations that exploit hardware extensions.

A performance evaluation method for optimizing embedded applications

Parallelism and adaptability are two distinct architectural
design considerations in embedded processors. Multicore
processors accelerate application execution on account of
their inherent parallelism and run-time reconfiguration capabilities
add adaptability during infield deployment. To benefit from
both these features, a reconfigurable multiprocessor architecture

Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing

This paper is concerned with Field Programmable Gate Arrays (FPGA)-based systems for energy-efficient high-throughput string comparison. Modern applications which involve comparisons across large data sets—such as large sequence sets in molecular biology—are by their nature computationally intensive. In this work, we present a scalable FPGA-based system architecture to accelerate the comparison of binary strings. The current architecture supports arbitrary lengths in the range 16 to 2048-bit, covering a wide range of possible applications. In our example application, we consider DNA sequences embedded in a binary vector space through Locality Sensitive Hashing (LSH) one of several possible encodings that enable us to avoid more costly character-based operations. Here the resulting encoding is a 512-bit binary signature with comparisons based on the Hamming distance. In this approach, most of the load arises from the calculation of the O ( m ∗ n ) Hamming distances between the signatures, where m is the number of queries and n is the number of signatures contained in the database. Signature generation only needs to be performed once, and we do not consider it further, focusing instead on accelerating the signature comparisons. The proposed FPGA-based architecture is optimized for high-throughput using hundreds of computing elements, arranged in a systolic array. These core computing elements can be adapted to support other string comparison algorithms with little effort, while the other infrastructure stays the same. On a Xilinx Virtex UltraScale+ FPGA (XCVU9P-2), a peak throughput of 75.4 billion comparisons per second—of 512-bit signatures—was achieved, using a design with 384 parallel processing elements and a clock frequency of 200 MHz. This makes our FPGA design 86 times faster than a highly optimized CPU implementation. Compared to a GPU design, executed on an NVIDIA GTX1060, it performs nearly five times faster.

https://www.mdpi.com/1999-4893/13/2/47/pdf

Accelerating Binary String Comparisons with a Scalable, Streaming-Based System Architecture Based on FPGAs

This paper presents a video tracking system for tracking players in indoor sports using two high quality digital cameras. The tracking algorithm is a based on template matching technique taking into consideration closed world assumptions. The output of the system can be visualized interactively for convenient analysis of player movements. The implementation has been efficiently done as a software system that can be used by coaches and sport scientists.

Ulrich Rückert

Papers

A VLSI friendly neural network with localised transfer functions

A performance evaluation method for optimizing embedded applications

Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing

Accelerating Binary String Comparisons with a Scalable, Streaming-Based System Architecture Based on FPGAs

Template matching based tracking of players in indoor team sports