U
Ulrich Rückert
Researcher at Bielefeld University
Publications - 363
Citations - 3446
Ulrich Rückert is an academic researcher from Bielefeld University. The author has contributed to research in topics: Robot & Field-programmable gate array. The author has an hindex of 26, co-authored 357 publications receiving 3235 citations. Previous affiliations of Ulrich Rückert include Technische Universität München & Technical University of Dortmund.
Papers
More filters
Proceedings Article
SOM Hardware-Accelerator
TL;DR: A high performance system with the latest NBISOM_25 chips is presented, which runs SOM applications with up to 400 elements in parallel mode (20 by 20 map) using FPGAs.
Journal ArticleDOI
Resource-efficient bio-inspired visual processing on the hexapod walking robot HECTOR
Hanno Gerd Meyer,Hanno Gerd Meyer,Daniel Klimeck,Jan Paskarbeit,Ulrich Rückert,Martin Egelhaaf,Mario Porrmann,Axel Schneider,Axel Schneider +8 more
TL;DR: A bio-inspired controller for collision avoidance and navigation was implemented on a novel, integrated System-on-Chip-based hardware module used to control visually-guided navigation behavior of the stick insect-like hexapod robot HECTOR.
Book ChapterDOI
Teleoperation of a Mobile Autonomous Robot using Web Services
TL;DR: This project studies the suitability of the web service standards and technologies for the teleoperation of mobile autonomous robots and provides access to a mobile autonomous robot via a web service interface.
Supplementary Data for the Paper entitled ''An Analytical Study of Time of Flight Error Estimation in Two-Way Ranging Methods''
TL;DR: An analytical study of time of flight error estimation in two-way Ranging Methods is presented in this paper, which was submitted to the Ninth International Conference on Indoor Positioning and Indoor Navigation (IPIN) 2018.
Book ChapterDOI
A High Performance SOFM Hardware-System
TL;DR: A high performance system with the latest NBISOM_25 chips is presented, which runs SOFM applications with up to 400 elements in parallel mode (20 by 20 map) using FPGAs.