Showing papers by "Wolfgang Fichtner published in 2001"
TL;DR: An overview of the algorithm, performance results and the integration of the solver into complex industrial simulation tools are given and an example is discussed inherently (due to the design goal) producing linear systems close to singularity.
186 citations
TL;DR: An implementation of the density-gradient device equations which is simple and works in any dimension without imposing additional requirements on the mesh compared to classical simulations is described, applicable to real-world device simulation with complex geometries.
Abstract: We describe an implementation of the density-gradient device equations which is simple and works in any dimension without imposing additional requirements on the mesh compared to classical simulations. It is therefore applicable to real-world device simulation with complex geometries. We use our implementation to determine the quantum mechanical effects for a MOS-diode, a MOSFET and a double-gated SOI MOSFET. The results are compared to those obtained by a 1D-Schrodinger-Poisson solver. We also investigate a simplified variant of the density-gradient term and show that, while it can reproduce terminal characteristics, it does not give the correct density distribution inside the device.
166 citations
TL;DR: In this article, the static and dynamic thermal behavior of IGBT module system mounted on a water-cooled heat sink is analyzed using an RC component model (RCCM) to extract thermal resistances and time constants.
Abstract: The insulated gate bipolar transistor (IGBT) modules are getting more accepted and increasingly used in power electronic systems as high power and high voltage switching components. However, IGBT technology with high speed and greater packaging density leads to higher power densities on the chips and increases higher operating temperatures. These operating temperatures in turn lead to an increase of the failure rate and a reduction of the reliability. In this paper, the static and dynamic thermal behavior of IGBT module system mounted on a water-cooled heat sink is analyzed. Although three-dimensional finite element method (3-D FEM) delivers very accurate results, its usage is limited by an imposed computation time in arbitrary load cycles. Therefore, an RC component model (RCCM) is investigated to extract thermal resistances and time constants for a thermal network. The uniqueness of the RCCM is an introduction of the time constants based on the Elmore delay, which represents the propagation delay of the heat flux through the physical geometry of each layer. The dynamic behavior predicted by the thermal network is equivalent to numerical solutions of the 3-D FEM. The RCCM quickly offers insight into the physical layers of the components and provides useful information in a few minutes for the arbitrary or periodic power waveforms. This approach enables a system designer to couple the thermal prediction with a circuit simulator to analyze the electrothermal behavior of IGBT module system, simultaneously.
147 citations
TL;DR: In this paper, the authors analyzed the effect of slotline, parallel plane, and surface wave (SW) modes on electromagnetic compatibility and signal integrity of printed circuit boards (PCBs).
Abstract: In this paper, parasitic modes, such as slotline, parallel plane, and surface wave (SW) modes, commonly found on printed circuit boards (PCBs) are analyzed and their effects on electromagnetic compatibility (EMC) and signal integrity are discussed. The analysis is based on numerical simulations using the finite difference time domain (FDTD) method which is shown to be very well suited for rigorous modeling of parasitic mode effects. The EMC and signal integrity problems discussed include power loss, crosstalk, ground bounce, and free space radiation. Design guidelines for improved EMC and signal integrity are derived from the results obtained. Comprehensive simulation and characterization of SWs using FDTD is presented for the first time.
96 citations
TL;DR: In this paper, an averaging procedure is applied to inelastic acoustic-phonon scattering, which leads to lattice-temperature-dependent constants for the phonon energy and the square of phonon wave vector, thus facilitating the search of after-scattering states in full-band Monte Carlo simulations.
Abstract: An averaging procedure is applied to inelastic acoustic–phonon scattering which leads to lattice-temperature-dependent constants for the phonon energy and the square of the phonon wave vector. The resulting scattering rate depends on energy only thus facilitating the search of after-scattering states in full-band Monte Carlo simulations. The model still accurately reproduces the velocity–field characteristics over a wide range of lattice temperatures, but in silicon the hot-hole tail of the energy distribution is strongly enhanced compared with the elastic equipartition approximation.
22 citations
TL;DR: In this paper, simulations of SCM measurements on bevelled and micro-sectioned samples for investigating the impact of the carrier spilling effect are compared with experimental data obtained from dedicated samples calibrated by spreading resistance profiling.
21 citations
02 Dec 2001
TL;DR: In this paper, the authors propose a methodology called on-chip ESD protection, which is based on a kind of lightning conductor in the form of a protection element on the product itself.
Abstract: Electrostatic discharges (ESD) have always been a serious problem in the semiconductor industry The presence of high electric fields and the amount of energy dissipated by the semiconductor devices during an ESD can give rise to electric breakdown of sensitive isolation layers as well as local melting, which leads to a latent damage or even breakdown of the whole integrated circuit (IC) One measure to prevent the breakdown of the IC is to provide the product with an adequate ESD robustness by implementing a kind of lightning conductor in the form of a protection element on the product itself This methodology is called on-chip ESD protection
16 citations
11 Sep 2001
TL;DR: 2D device simulations show reasonable agreement with measurements and reveal that an altered electric field distribution in the substrate is responsible for the drastically increased substrate current collection in case of a nearby grounded substrate contact.
Abstract: Junction isolated logic devices in smart-power ICs collect carriers from the substrate, which may lead to malfunction and costly redesigns therefore. For the first time, minority carrier collection has been measured and simulated under transient application-near injection. Bias and measurement conditions have been varied. The largest amount of minority carriers is collected if a substrate contact close to an n-tub is grounded and/or at high temperature. 2D device simulations show reasonable agreement with measurements and reveal that an altered electric field distribution in the substrate is responsible for the drastically increased substrate current collection in case of a nearby grounded substrate contact.
14 citations
TL;DR: Silicon verification proved the excellent simulation quality of the electrical behavior and, furthermore, of ESD thresholds of the pre-silicon ESD-protection concept.
13 citations
06 May 2001
TL;DR: A new scheme for controlling the rate of increase of the collector current is introduced and a globally synchronous sampling time for synchronizing multiple modules is derived locally, which avoids the need of high timing resolution in the optical links.
Abstract: A controller for combined parallel- and series-connected IGBT modules is reported. An advanced system state classification is applied to allow for real-time reconfiguration of the local controller structure. Thereby, a new scheme for controlling the rate of increase of the collector current is introduced. A globally synchronous sampling time for synchronizing multiple modules is derived locally. This avoids the need of high timing resolution in the optical links.
13 citations
TL;DR: In this paper, the authors present the results and the performances of SCaMsim, a new 3D Scanning Capacitance Microscopy (SCM) simulation tool based on a finite elements (FE) device simulation software (DESSISISE).
Abstract: Quantitative dopant profiling by Scanning Capacitance Microscopy (SCM) still requires a large effort in terms of modelling. While the analytical approach remains useful because of its simplicity, the numerical approach takes better account of the three-dimensional (3D) features and the complex non-linear response of the system. In this paper, we present the results and the performances of SCaMsim, a new 3D SCM simulation tool. SCaMsim is based on a finite elements (FE) device simulation software (DESSISISE) and allows calibration of constant-dV and constant-dC measurements via the calculation of theoretical C-V curves of different, realistic tip-sample geometries. Some of the results obtained with different tip models are presented and compared to other published data.
TL;DR: In this paper, a 3D simulation model was used to investigate the occurrence of contrast reversal (CR) in SCM images, and the experimental dC/dV curves were in better agreement with the 3D simulations.
Abstract: The occurrence in SCM images of contrast reversal (CR) phenomena (i.e. a non-monotonic relationship between the amplitude of the SCM signal and the local carrier concentration) has been investigated theoretically by a three dimensional (3D) simulation model and experimentally by measurements of calibrated staircase structures. The CR effect is commonly ascribed to an improper DC bias voltage, far away from the flat band voltage, and this assumption has been supported in the past by two-dimensional (2D) simulations. Simulations with a 3D model show that CR phenomena are less likely to occur than foreseen by the 2D model. The experimental dC/dV curves are in better agreement with the 3D simulations. However, CR phenomena are observed sometimes in a sporadic way even when the DC bias voltage is correctly set at the experimental flat band voltage. A sudden degradation of the probe-tip is probably the cause of the sporadic occurrence of CR phenomena.
TL;DR: The substrate potential shift due to minority carrier injection by the lateral parasitic NPN transistor has been measured on a test chip and analyzed by 3D device simulation and the measurements are in good agreement.
TL;DR: In an n-MOSFET with a metallurgical channel length of 50nm, the saturation drain current is enhanced by up to 11%, but this maximum improvement is essentially already achieved at a Ge-content of 20% emphasizing the role of the low-field mobility as a key indicator of device performance in the deep-submicron regime.
Abstract: The strain-dependence of electron transport in bulk Si and deep-submicron MOSFETs is investigated by full-band Monte Carlo simulation. On the bulk level, the drift velocity at medium field strengths is still enhanced above Ge-contents of 20% in the substrate, where the low-field mobility is already saturated, while the saturation velocity remains unchanged under strain. In an n-MOSFET with a metallurgical channel length of 50nm, the saturation drain current is enhanced by up to 11%, but this maximum improvement is essentially already achieved at a Ge-content of 20% emphasizing the role of the low-field mobility as a key indicator of device performance in the deep-submicron regime.
09 Jul 2001
TL;DR: In this article, the optical cavity of a vertical-cavity surface-emitting laser (VCSEL) is analyzed with the goal of performing a coupled electro-optical simulation of the device.
Abstract: In this work the optical cavity of a vertical-cavity surface-emitting laser (VCSEL) is analyzed with the goal of performing a coupled electro-optical simulation of the device. For this simulation, the eigenmodes and the eigenvalues of the optical cavity have to be obtained. A common approach is to treat Maxwell's equations in the frequency domain and to solve the resulting algebraic eigenvalue equation. As an alternative, the electromagnetic problem is solved in time-domain. The response of the optical cavity is calculated by the finite-difference time-domain (FDTD) method. The optical wave propagation is modeled rigorously, including evanescent and propagating waves. From the FDTD simulation, a steady state optical intensity pattern is extracted. The eigenvalues of the dominant modes are determined using a Pade type approximation.
11 Sep 2001
Abstract: We report on the experimental investigation and numerical simulation of Shallow Trench Isolation (STI) technology. Process simulations and three-dimensional (3D) device simulations for STI technologies have been carried out and compared with measurements. The model parameters for the oxide growth have been calibrated for the most important crystal orientations. We have paid special attention to the unique behavior of the low-pressure oxidation. The shape of the top and bottom edges of the STI including faceting has been examined in detail. We also performed 3D device simulations to study the effects of the oxide shape on the performance of STI MOSFETs of different channel widths. It is demonstrated that a parasitic conduction channel is forming along the edge of the STI and is responsible for the shift of threshold voltage.
21 May 2001
TL;DR: In this paper, the dopant quantification error introduced in scanning capacitance microscopy measurements by the nonlinearity of the capacitance-tovoltage characteristic of MOS structures is investigated.
Abstract: In this paper we investigate the dopant quantification error introduced in scanning capacitance microscopy measurements by the nonlinearity of the capacitance-to-voltage characteristic of MOS structures. The C-V response of the measurement set up is derived by finite element simulation and the systematic error introduced by signal processing is quantified by harmonic distortion analysis. It is shown that the investigated effect can lead to a systematic overestimate of the dopant concentration ranging from a factor of 2 up to a factor of 20, depending on the experimental conditions.
TL;DR: Hardware and software codesign and flexibility requirements often necessitate embedded application-specific instruction-set processors in system-on-chip designs, so Spaceman, a reusable stack-processor virtual component, offers a customer- configured instruction set; parameterizable bus widths, stack depths, and stack access ranges; and selectable bus interfaces.
Abstract: Hardware and software codesign and flexibility requirements often necessitate embedded application-specific instruction-set processors in system-on-chip designs. Spaceman, a reusable stack-processor virtual component, offers a customer-configurable instruction set; parameterizable bus widths, stack depths, and stack access ranges; and selectable bus interfaces.
01 Jan 2001
TL;DR: In this paper, a simplified model for inelastic acoustic phonon scattering of holes in silicon is developed, which consists in approximating both the acoustic phonons energy and the square of the phonon wave vector by lattice-temperature dependent constants.
Abstract: A simplified model for inelastic acoustic phonon scattering of holes in silicon is developed It consists in approximating both the acoustic phonon energy and the square of the phonon wave vector by lattice—temperature dependent constants The resulting scattering rate depends only on energy and thus facilitates the search of after—scattering—states during full—band Monte Carlo simulation The simulation results for the velocity—field characteristics accurately agree with the experimental data at different lattice temperatures, while the population of hot—hole states is significantly enhanced compared to the elastic equipartition approximation The value of the energy relaxation time to be used in hydrodynamic device simulations is roughly 01 ps