Showing papers in "Computers & Electrical Engineering in 2007"

TL;DR: This work has realized a misuse detection system based on genetic algorithm (GA) approach that was able to keep the high level of detection rates of attacks while speeding up the processing of the data.

TL;DR: This paper proposes a new algorithm that uses multiple scheduling strategies for efficient non-preemptive scheduling of tasks, known as group-EDF (gEDF), based on dynamic grouping of tasks with deadlines that are very close to each other, and using Shortest Job First technique to schedule tasks within the group.

TL;DR: The suggested architecture provides an enhanced security protection scheme for use in smartphones, PDA's, as well as other similar systems, and sensitive data storage facilities, cryptographic engines, and physical protection mechanisms are presented and described in detail.

TL;DR: The first differential power and electromagnetic analysis attacks performed on a hardware implementation of an elliptic curve cryptosystem are described and the use of the Pearson correlation coefficient, the distance of mean test and the maximum likelihood test is described.

TL;DR: The proposed heuristic is based on a branch-and-bound search technique and identification of sets of compatible states of a given ISFSM specification and has obtained results as good as the best exact method in the literature but with significantly better run-times.

TL;DR: IPv6 protocol, which should replace the actual IPv4 protocol, brings many new possibilities and improvements considering simplicity, routing speed, quality of service and security, but security remains a very important issue since there are some security threats and attack types that can affect IPv6 network.

TL;DR: The main aim of this work consists in answering the question when will a task be mapped in the FPGA?

TL;DR: A novel algorithm for wavelet based ECG signal coding is proposed that outperforms than other coders such as Djohn, EZW, SPIHT, etc., exits in the literature in terms of simplicity and coding efficiency.

TL;DR: The feasibility of using reconfigurable computing platforms to improve the performance of CAD optimization algorithms for the VLSI circuit partitioning problem is investigated and the proposed Genetic algorithm architecture achieves up-to 5x speedup over conventional software implementation while maintaining on average 88% solution quality.

TL;DR: An identity-based threshold decryption scheme IB-ThDec is proposed and its security is reduced to the Bilinear Diffie-Hellman problem and the formal proof of security of this scheme is provided in the random oracle model.

TL;DR: Two architectures are investigated, one using a projective coordinate representation for hyperelliptic systems and the second using a mixed coordinate representation that eliminates the need for field inversions in the point arithmetic, which has been proven to be expensive in both time and space.

TL;DR: It is pointed out that Zhou et al.'s schemes are insecure against undelegated proxy signature attack because any user without the delegation of the original signer can generate a valid proxy signature.

TL;DR: Two different approaches to the design of a reconfigurable Tate pairing hardware accelerator using macro components based on a large, fixed number of underlying Galois Field arithmetic units in parallel to minimise the computation time are presented.

TL;DR: The complete processor (excluding memory) for images of 256x256 pixels has been implemented using only one general-purpose low-cost FPGA chip, thus proving the design reliability and its relative simplicity.

TL;DR: A new dynamic hardware/software co-design methodology for pre- and post-manufacturing design for Network-on-chip (NoC) based design of complex hardware/ software systems is presented.

TL;DR: An authenticated encryption scheme with message linkages used to deliver a large message so that the receiver can easily convert the signature into an ordinary one that can be verified by anyone.

TL;DR: Some improvements for the Lyuu-Wu scheme and Hwang-Chen schemes are pointed out according to Wang et al.'s methods that can resist the insider attack.

TL;DR: A new hamming weight pyramid (HWP) is proposed to succinctly compress the information about the distribution of the hamming weights of canonical signed digit (CSD) representation in a visually appealing manner for analysis and synthesis.

TL;DR: A prediction system that can predict most information in the grid environment Whether the repetitive time series pattern of the information exists or not, the proposed system can provide prediction results.

TL;DR: An optimized inversion algorithm that can be applied very well in hardware avoiding well known inversion problems is proposed and a modified version of this algorithm that apart from inversion can perform multiplication using the architectural structure of inversion is proposed.

TL;DR: A vision based approach for calculating accurate 3D models of the objects, involving the calculation of matching points at the coarsest level with consequent refinement up to the finest level, is presented.

TL;DR: This paper integrates an assertion-based verification methodology with an object-oriented system-level synthesis methodology to address the problem of HW/SW co-verification and describes the system- level assertion language and the corresponding synthesis method.

TL;DR: Experimental results show that systems that employ the proposed controllers can quickly achieve the required system performance and the PID controller has the best performance, and can improve delay performance by a rate 11.44% that without the feedback controller.

TL;DR: A compact FPGA implementation of a modular exponentiation accelerator suited for cryptographic applications that performs modular exponentiations with up to 2250-bit integers and scales easily to larger exponentiations.

TL;DR: The proposed architecture proves that HW/SW co-design provides a high performance close to ASIC solutions with a flexible feature of SW even on a small CPU.

TL;DR: The Hidden Markov Models (HMMs) concept which is suitable for solving a dynamic situation is introduced and applied to the call admission control policy and can satisfy both CDP and CBP issues, but also improve the system utilization.

TL;DR: The research work for constructing a system to address the challenges faced by hosting Web content on a server farm environment is described and performance data measured from a real hosting service is reported.

TL;DR: In this article, the adaptive pre-task assignment (APA) strategy for heterogeneous distributed raytracing system is presented, which reduces the inter-processes communication, the cost overhead of the node's idle time and load imbalance, which normally occurs in traditional runtime task scheduling.

TL;DR: The issue of packet loss has been successfully addressed in this paper by the insertion of random values and the PBEC with the utilization ofrandom values would make the VoIP a better communication tool.

TL;DR: A simple and efficient multicast scheduling algorithm, the Lookback Queue Access (LBQA) protocol for the employment in an asynchronous WDM optical star network, and an interconnected dual-star structure employed with the enhanced scheduling mechanism, the DS_ LBQA algorithm.