Showing papers in "IEEE Transactions on Circuits and Systems I-regular Papers in 1992"
TL;DR: Several stability results and additional properties of the delay-type neural network and cellular network dynamics are proved, including that if the feedback and delayed feedback matrices are nonnegative and their sum is irreducible, then the neural network is stable.
Abstract: Several stability results and additional properties of the delay-type neural network and cellular network dynamics are proved. As a typical example, it is proved that if the feedback and delayed feedback matrices are nonnegative and their sum is irreducible, then the neural network is stable. >
267 citations
TL;DR: An approach for transient simulation of lossy interconnects terminated in arbitrary nonlinear elements based on convolution simulation is presented in this article, where Pade approximations of each line's characteristics or each multiconductor line's modal functions are used to derive a recursive convolution formulation, which greatly reduces the amount of computation used to perform convolutions.
Abstract: An approach for transient simulation of lossy interconnects terminated in arbitrary nonlinear elements based on convolution simulation is presented. The Pade approximations of each line's characteristics or each multiconductor line's modal functions are used to derive a recursive convolution formulation, which greatly reduces the amount of computation used to perform convolutions. The approach can handle frequency-varying effects, such as skin effects, and general coupling situations. The errors introduced by Pade approximations are analyzed, and a scheme for determining the necessary order for an approximation is developed. The approach has been incorporated in the stepwise equivalent conductance timing simulator (SWEC) for digital CMOS circuits. Comparisons with SPICE3.e indicate that SWEC, which gives accurate results, can be one to two orders of magnitude faster. >
259 citations
TL;DR: In this article, saddle node bifurcation is defined as a generic instability of parameterized differential equation models and its geometry and its implications for the study of voltage collapse in electric power systems are described.
Abstract: Saddle node bifurcation is a generic instability of parameterized differential equation models. The bifurcation geometry and some implications for the study of voltage collapse in electric power systems is described. The initial direction in state space of dynamic voltage collapse can be calculated from a right eigenvector of a static power system model. The normal vector to the bifurcation set in parameter space is a simple function of a left eigenvector and is expected to be useful in emergency control near bifurcation and in computing the minimum distance to bifurcation in parameter space. >
232 citations
TL;DR: In this paper, the authors studied the mechanism for voltage collapse and showed that load power margin calculations can be misleading if the immediate instability phenomenon is neglected, leading to a dynamic voltage collapse leading to blackout.
Abstract: When a generator of a heavily loaded electric power system reaches a reactive power limit, the system can become immediately unstable and a dynamic voltage collapse leading to blackout may follow. The statics and dynamics of this mechanism for voltage collapse are studied by example and by the generic theory of saddle node and transcritical bifurcations. It is shown that load power margin calculations can be misleading if the immediate instability phenomenon is neglected. >
226 citations
TL;DR: In this article, a closed form, without approximations, for an idealized current-mode controlled boost converter was derived in closed form for a single-input single-output (SISO) system.
Abstract: A mapping is derived in closed form, without approximations, for an idealized current-mode controlled boost converter. This circuit is known experimentally to behave chaotically for certain values of the reference current, and to produce subharmonics of the clock frequency at others. Numerical iteration of the mapping indicates chaotic operation and the presence of subharmonics. Two mechanisms of bifurcation are explained. >
222 citations
IBM1
TL;DR: In this paper, two extensions to the partial element equivalent circuit (PEEC) approach for interconnect modeling are presented, including retardation, the effect of the finite speed of electromagnetic interactions, is included.
Abstract: Two extensions to the partial element equivalent circuit (PEEC) approach for interconnect modeling are presented. First, retardation, the effect of the finite speed of electromagnetic interactions, is included. Second, PEEC is extended to include a circuit model of finite-size homogeneous dielectrics. It is shown that the retarded PEEC formulation with the new dielectric model is equivalent to a full-wave solution of Maxwell's equation. Since they can be combined with linear and nonlinear circuits, the resulting models are more flexible than existing full-wave solvers. >
212 citations
TL;DR: A computer-oriented method for the time-domain analysis of networks with internally controlled ideal switches is presented, and it is shown that Dirac impulses must be considered for the analysis of some switched networks.
Abstract: A computer-oriented method for the time-domain analysis of networks with internally controlled ideal switches is presented No assumptions are made about the continuity of the circuit response at the switching instants; even Dirac impulses are permitted In fact, it is shown that Dirac impulses must be considered for the analysis of some switched networks, even though they may only be present for intermediate steps of the analysis Several topological changes may be needed at each switching instant to ensure that the topology after switching is valid The theories have been implemented in a computer program, SWANN The network equations are generated with a two-graph modified nodal analysis technique, rather than the state equation formulation Various internally controlled switches are permitted, such as the ideal diode, thyristor, and voltage- and current-controlled switches Numerical results show the generality and accuracy of the method on three switched networks >
192 citations
TL;DR: Various circuit architectures of simple neuron-like analog processors are considered for online solving of a system of linear equations with real constant and/or time-variable coefficients and can be used for solving linear and quadratic programming problems.
Abstract: Various circuit architectures of simple neuron-like analog processors are considered for online solving of a system of linear equations with real constant and/or time-variable coefficients. The proposed circuit structures can be used, after slight modifications, in related problems, namely, inversion and pseudo-inversion of matrices and for solving linear and quadratic programming problems. Various ordinary differential equation formulation schemes (generally nonlinear) and corresponding circuit architectures are investigated to find which are best suited for VLSI implementations. Special emphasis is given to ill-conditioned problems. The properties and performance of the proposed circuit structures are investigated by extensive computer simulations. >
188 citations
TL;DR: The AWESpice algorithm, which combines the linear multiport macromodels of interconnect with general nonlinearities in a time domain simulation, is described.
Abstract: The interconnect analysis problem is treated in a general fashion, exploiting the efficiency and accuracy of asymptotic waveform evaluation (AWE) for the linear interconnect portion of the circuit while using the SPICE simulator for the nonlinear portions. An algorithm that allows the use of partitioned circuit solution techniques in conjunction with AWE is described. A special technique for determining the moments of a partition comprising distributed elements is presented. Moment-computation algorithms for AWE are combined with the method of characteristics to form another type of macromodel for systems of coupled lossy lines. The AWESpice algorithm, which combines the linear multiport macromodels of interconnect with general nonlinearities in a time domain simulation, is described. Results of using the techniques are provided. >
178 citations
TL;DR: In this article, the global asymptotic stability of the equilibrium x = 0 of nth order discrete-time systems with state saturations was established for a class of positive definite and radially unbounded Lyapunov functions.
Abstract: New results for an established for the global asymptotic stability of the equilibrium x=0 of nth order discrete-time systems with state saturations, x(k+1)=sat(Ax(k)), utilizing a class of positive definite and radially unbounded Lyapunov functions, v. When v is a quadratic form, necessary and sufficient conditions are obtained under which positive definite matrices H can be used to generate a Lyapunov function v(w)=w/sup T/Hw with the properties that v(Aw(k)) is negative semidefinite, and that v(sat(w)) >
166 citations
TL;DR: An algorithm that does not require a line search or a knowledge of the Hessian is developed based on the conjugate gradient method, capable of providing convergence comparable to recursive least squares schemes at a computational complexity that is intermediate between the least mean square (LMS) and the RLS methods.
Abstract: The application of the conjugate gradient technique for the solution of the adaptive filtering problem is discussed. An algorithm that does not require a line search or a knowledge of the Hessian is developed based on the conjugate gradient method. The choice of the gradient average window in the algorithm is shown to provide a trade-off between computational complexity and convergence performance. The method is capable of providing convergence comparable to recursive least squares (RLS) schemes at a computational complexity that is intermediate between the least mean square (LMS) and the RLS methods and does not suffer from any known instability problems. >
TL;DR: The authors describe how to extend the multiple-accelerated boundary-element method for 3-D capacitance computation to the case where conductors are embedded in an arbitrary piecewise-constant dielectric medium.
Abstract: The authors describe how to extend the multiple-accelerated boundary-element method for 3-D capacitance computation to the case where conductors are embedded in an arbitrary piecewise-constant dielectric medium. Results are presented to demonstrate that the method is accurate, has nearly linear computational growth, and can be nearly two orders of magnitude faster than the standard boundary-element method based on matrix factorization. >
TL;DR: In this article, a general class of current amplifier-based biquadratic filter circuits capable of realizing arbitrary filter functions including the low-pass, high-pass and bandpass transfer functions is presented.
Abstract: A general class of current amplifier-based biquadratic filter circuits capable of realizing arbitrary filter functions including the low-pass, high-pass, and bandpass transfer functions is presented. These realizations are derived from a class of well-known low sensitivity single amplifier biquadratic (SAB) filter circuits using the principle of adjoint networks. The salient features of the proposed circuits are that they are synthesized using the same procedure as their op-amp-based SAB circuit counterparts, and they possess the same sensitivities to component variations as the original SAB circuits. However, it is demonstrated experimentally that unlike op-amp-based SAB realizations whose effective operating bandwidth is much less than the unity-gain bandwidth of the op-amp, these current-based filter circuits are effective over the entire bandwidth of the current amplifier. >
TL;DR: Two universal approximation schemes in terms of combinations of univariate canonical piecewise-linear functions are proposed and the discussion supports the application of these schemes in mapping networks, e.g. neural networks or adaptive nonlinear filters.
Abstract: The canonical representation of piecewise-linear functions is considered as a universal approximation scheme of multivariate functions. Meanwhile, two universal approximation schemes in terms of combinations of univariate canonical piecewise-linear functions are proposed. The discussion supports the application of these schemes in mapping networks, e.g. neural networks or adaptive nonlinear filters. >
TL;DR: It is shown that a subset of the optimal realization set consists of sparse Schur realizations, whose actual sensitivity is even smaller than the theoretical minimal sensitivity.
Abstract: The optimal finite word length (FWL) state-space digital system problem is investigated. Instead of the unusual sensitivity measure, it is argued that it may be desirable to minimize a frequency weighted sensitivity measure over all similarity transformations. The set of optimal realizations minimizing this weighted sensitivity is completely characterized, and an algorithm is proposed to find the optimal solution set. It is shown that a subset of the optimal realization set consists of sparse Schur realizations, whose actual sensitivity (taking into account the zero elements) is even smaller than the theoretical minimal sensitivity. Some properties of the Schur realizations are discussed. A numerical example that confirms the theoretical results is given. >
TL;DR: Two polynomial-time heuristics are introduced: fixed-rate (rate-optimal as a special case) scheduling where the number of hardware resources is optimized at the same time that a specific iteration period is guaranteed, and maximum-throughput scheduling with limited resources where the iteration period are optimized for a fixed number of processors.
Abstract: An alternative method for the scheduling of iterative data-flow graphs is described. The method is based on the scheduling-range chart, which contains the information on the range within which each operation in the graph can be scheduled. The scheduling range is determined by considering the intraiteration and interiteration precedence relations. The goal is to find an optimal position within the scheduling range of each operation in such a way that some quality criteria (number of hardware resources, iteration period, latency, register lifetime) are optimized. A formal proof of the NP-completeness of the problem is given and two polynomial-time heuristics are introduced: fixed-rate (rate-optimal as a special case) scheduling where the number of hardware resources is optimized at the same time that a specific iteration period is guaranteed, and maximum-throughput scheduling with limited resources where the iteration period is optimized for a fixed number of processors. The algorithms are able to find optimal solutions for well-known benchmark examples. >
TL;DR: In this article, a class of synchronized queueing networks with deterministic routing is identified to be equivalent to a subclass of timed Petri nets called marked graphs, where ergodicity is derived from the boundedness and liveness of the underlying Petri net representation.
Abstract: A class of synchronized queueing networks with deterministic routing is identified to be equivalent to a subclass of timed Petri nets called marked graphs. Some structural and behavioral properties of marked graphs are used to show interesting properties of this class of performance models. In particular, ergodicity is derived from the boundedness and liveness of the underlying Petri net representation. In the case of unbounded (i.e., nonstrongly connected) marked graphs, ergodicity is computed as a function of the average transition firing delays. For steady-state performance, linear programming problems defined on the incidence matrix of the underlying Petri nets are used to compute tight (i.e., attainable) bounds for the throughput of transitions for marked graphs with deterministic or stochastic time associated with transitions. These bounds depend on the initial marking and the mean values of the delays but not on the probability distortion functions. The benefits of interleaving qualitative and quantitative analysis of marked graph models are shown. >
TL;DR: The first monolithic realization of the nonlinear element in Chua's circuit was reported in this paper, which is referred to as the Chua diode and can be used as the basic nonlinear component for the experimental synthesis of a broad class of circuits, including cellular neural networks.
Abstract: The first monolithic realization of the nonlinear element in Chua's circuit, now generally called Chua's diode, is reported. The element has been fabricated using a CMOS integrated circuit technology. It can be used as the basic nonlinear component for the experimental synthesis of a broad class of circuits, including cellular neural networks, which exhibits an extremely rich variety of bifurcation, chaotic, and nonlinear wave phenomena. >
TL;DR: It is shown in detail how the resistive grid can be cast as a CNN, and the use of frequency-domain techniques to characterize the input-output behavior of resistive grids of both infinite and finite size is discussed.
Abstract: The cellular neural network framework developed by L.O. Chua and L. Yang (IEEE Trans. Circuits Syst., vol.32, Oct. 1988) is used to analyze the image filtering operation performed by the VLSI linear resistive grid. In particular, it is shown in detail how the resistive grid can be cast as a CNN, and the use of frequency-domain techniques to characterize the input-output behavior of resistive grids of both infinite and finite size is discussed. These results lead to a theoretical justification of one of the so-called folk theorems commonly held by researchers using resistive grids: resistive grids are robust in the presence of variations in the values of the resistors. An application to edge detection is proposed. In particular, it is shown that the filtering performed by the grid is similar to the exponential filter in the edge detection algorithm proposed by J. Shen and S. Castan (1986). >
TL;DR: In this paper, the L/sup 2/-sensitivity balanced truncation problem is studied, and a specific form of the solution is derived together with a bound, which gives an insight into the difference between a pure L /sup 2/sensitivity optimal realization and a mixed L / sup 2/L/sup 1/s sensitivity optimal one.
Abstract: Properties of the solution to the L/sup 2/-sensitivity minimization problem are discussed. In particular, a specific form of the solution is derived together with a bound. This bound gives an insight into the difference between a pure L/sup 2/-sensitivity optimal realization and a mixed L/sup 2//L/sup 1/-sensitivity optimal one. The question of L/sup 2/-sensitivity balanced truncation is addressed, and a counterexample is presented to show that two main properties associated with model reduction by truncating a Lyapunov balanced realization are lost in the case of L/sup 2/-sensitivity balanced truncation. >
TL;DR: An efficient unified DCT/IDCT chip is proposed to demonstrate the superiority of the formulation and can easily meet the speed requirement of 14.3 MHz real-time operation with the current 2 mu m CMOS technology.
Abstract: A unified approach to the realization of forward and inverse discrete cosine transforms is proposed. With this approach, an odd prime length DCT/IDCT with two half-length convolutions can be realized without extra overhead in terms of the number of multiplications. The formulation is most suitable for realization using distributed arithmetic, in which case typical convolvers can be used as the core unit for the hardware implementation of the transforms. Hence, an efficient unified DCT/IDCT chip is proposed to demonstrate the superiority of the formulation. The proposed architecture can easily meet the speed requirement of 14.3 MHz real-time operation with the current 2 mu m CMOS technology. >
TL;DR: In this article, the dynamic process of voltage collapse is analyzed based on three mechanisms: on-load tap-changing, load dynamics, and generator excitation limiting, and the interaction among these mechanisms and how the voltage collapse takes place are thoroughly investigated in a general interconnected network model under the assumption that system frequency remains unchanged.
Abstract: The dynamic process of voltage collapse is analyzed based on three mechanisms: on-load tap-changing, load dynamics, and generator excitation limiting. The interaction among these mechanisms and how the voltage collapse takes place are thoroughly investigated in a general interconnected network model under the assumption that system frequency remains unchanged. It is found that, so long as an equilibrium exists, there is a maximal equilibrium. It is also established that there is a region in the state space corresponding to a monotonic fall of system voltages. When the reactive capability of generator(s) is reached, this region expands, whereas the voltage stability region shrinks. The system trajectory may eventually exit the stability region, whereupon the voltage begins to drop monotonically. It is shown that locking the tap-changers at an appropriate time helps the system voltage to reach a steady state, and therefore avoid the collapse. Numerical examples for a realistic power system are given to illustrate the theory. >
TL;DR: In this paper, an active resonator with Q>1 may only attain a specified dynamic range with the use of a larger tuning capacitance than its passive counterpart, and with a consequent larger lower dissipation at a given frequency of operation.
Abstract: Active resonators used to make bandpass filters are shown to suffer from a fundamental deterioration in available dynamic range with increasing Q, which is shown to arise from the dissipation in the transistors simulating inductance or performing an equivalent function. An active resonator with Q>1 may only attain a specified dynamic range with the use of a larger tuning capacitance than its passive counterpart, and with a consequent larger lower dissipation at a given frequency of operation. This poses a serious limitation on the integrated circuit realization of high-frequency filters with high-Q poles. >
TL;DR: In this paper, a new configuration for realizing a currentmode oscillator using single positive current-follower was presented, and the feasibility of obtaining a quadrature oscillator was investigated.
Abstract: A new configuration for realizing a current-mode oscillator using single positive current-follower is presented. The circuit uses three grounded capacitors and three resistors. The feasibility of obtaining a quadrature oscillator is investigated. >
TL;DR: In this article, a sufficient condition is proved for a class of neural circuits that includes the Hopfield model as a special case to globally converge towards a unique stable equilibrium, which only requires symmetry and negative semi-definiteness of the neuron connection matrix and is extremely simple to check and apply in practice.
Abstract: A sufficient condition is proved guaranteeing that a class of neural circuits that includes the Hopfield model as a special case is globally convergent towards a unique stable equilibrium. The condition only requires symmetry and negative semi-definiteness of the neuron connection matrix T and is extremely simple to check and apply in practice. The consequences of the above result are discussed in the context of neural circuits for optimization of quadratic cost functions. >
TL;DR: In this paper, the design of optimal dynamic range integrators that are meant as building blocks for ODR analog continuous-time filters is discussed, and a fundamental limit for the dynamic range of an integrator is given.
Abstract: The design of optimal dynamic range integrators that are meant as building blocks for optimal dynamic range analog continuous-time filters is discussed. A fundamental limit for the dynamic range of an integrator is given. This limit is a function of the supply voltage and the available amount of capacitance. It is shown how integrators are to be designed if this limit is to be reached. Different conventional integrator realizations are evaluated and optimized so that they can be compared to the fundamental limit. A design example of a filter with integrators that approach this limit is given. >
TL;DR: In this article, the stability of operating points that satisfy the circuit's DC operations but are nonetheless unobservable operating points is examined in a rigorous way, and two classes of DC operating points, unstable and potentially stable, are defined, and simple criteria, based only on the circuits DC equations, that can classify a given operating point's stability are given.
Abstract: The stability of operating points that satisfy the circuit's DC operations but are nonetheless unobservable operating points is examined in a rigorous way. Two classes of DC operating points, unstable and potentially stable, are defined, and simple criteria, based only on the circuit's DC equations, that can classify a given operating point's stability are given. It is also shown that it suffices to model stray capacitance and inductance in only certain specific locations, for any given physical circuit, to correctly assess the stability of its operating point in the presence of a profusion of parasitic reactances. >
TL;DR: An efficient algorithm for finding all solutions of piecewise-linear resistive circuits is presented, and a simple and efficient sign test is proposed that remarkably reduces the number of linear simultaneous equations to be solved for found all solutions.
Abstract: An efficient algorithm for finding all solutions of piecewise-linear resistive circuits is presented. First, a technique that substantially reduces the number of function evaluations needed in the piecewise-linear modeling process is proposed. Then a simple and efficient sign test is proposed that remarkably reduces the number of linear simultaneous equations to be solved for finding all solutions. An effective technique that makes the sign test even more efficient is introduced. All of the techniques exploit the separability of nonlinear mappings. Some numerical examples are given, and it is shown that all solutions are computed rapidly. The algorithm is simple and efficient, and can be easily programmed. >
TL;DR: In this article, continuous piecewise-linear functions from R/sup n/ to r/sup m/ are analyzed in terms of the dimensions of their domain space and of degenerate kth-order intersections of region boundaries.
Abstract: Continuous piecewise-linear functions from R/sup n/ to R/sup m/ are analyzed in terms of the dimensions of their domain space and of degenerate kth-order intersections of region boundaries. The theory developed demonstrates how these two quantities are connected. Moreover, the exact number of independent parameters is demonstrated for boundary configurations containing degenerate intersections of arbitrary orders. >
TL;DR: A noniterative time-dependent circuit model is presented for transient analysis of general uniform and nonuniform interconnection structures terminated with arbitrary, linear or nonlinear loads.
Abstract: A noniterative time-dependent circuit model is presented for transient analysis of general uniform and nonuniform interconnection structures terminated with arbitrary, linear or nonlinear loads. Simulated or measured scattering parameter data are used to characterize the interconnection structures. No approximations or model fitting are required. At each point in time, all coupled ports of the interconnection structure are modeled as extended Thevenin equivalents, which consist of constant resistances and time-dependent voltage sources. This new general circuit representation is compatible with existing simulation programs such as SPICE. Simulations on circuits with linear and nonlinear loads illustrate the approach. >