Journal ArticleDOI
A single-chip CMOS filter/codec
Kazuo Yamakido,T. Suzuki,Hirotoshi Shirasu,M. Tanaka,K. Yasunari,J. Sakaguchi,S. Hagiwara +6 more
- Vol. 16, Iss: 4, pp 302-307
TLDR
A second generation LSI codec has been implemented with switched-capacitor filters, a charge redistribution encoder and decoder, voltage references, a signaling logic circuit, and all necessary functions for voice-PCM conversion are integrated.Abstract:
A second generation LSI codec has been implemented. In this chip, switched-capacitor filters, a charge redistribution encoder and decoder, voltage references, a signaling logic circuit, and all necessary functions for voice-PCM conversion are integrated. The authors describe the codec and summarizes its characteristics.read more
Citations
More filters
Journal ArticleDOI
Switched-capacitor circuit design
TL;DR: Circuit design techniques are described for switched-capacitor filters, modulators, rectifiers, detectors, and oscillators for telecommunications, speech processing, and other signal-processing systems.
Journal ArticleDOI
Technological design considerations for monolithic MOS switched-capacitor filtering systems
D.J. Allstot,W.C. Black +1 more
TL;DR: In this article, various technological and topological considerations for the design of monolithic MOS switched-capacitor (SC) filtering systems are described, and several important techniques are reviewed for maximizing dynamic range in SC circuits.
Patent
Auto-zeroing circuit for offset cancellation
TL;DR: In this article, an improved auto-zeroing feedback control circuit (FIG. 1) is disclosed to compensate for DC offset voltages in signal coding applications, which eliminates the requirement of a large external auto zero capacitor and permits the signal coder to be fully integrated on-chip.
Patent
Converter, offset adjustor, and portable communication terminal unit
Kazuo Yamakido,Yoichiro Kobayashi,Masanori Otsuka,Takao Okazaki,Yukihito Ishihara,Norimitsu Nishikawa,Yuko Tamba +6 more
TL;DR: In this article, the number of current sources and switches necessary for a plurality of unit D/A converters using equal reference currents is drastically reduced to reduce the parasitic capacitance coupled to current output lines.
References
More filters
Journal ArticleDOI
All-MOS charge-redistribution analog-to-digital conversion techniques. II
TL;DR: This second paper describes a two-capacitor successive approximation technique which, in contrast to the first, requires considerably less die area, is inherently monotonic in the presence of capacitor ratio errors, and which operates at somewhat lower conversion rate.
Journal ArticleDOI
MOS switched capacitor ladder filters
TL;DR: A new technique for designing precision, fully integrated, high-order filters using standard MOS technology is described, and an efficient method for implementing transmission zeros is presented.
Journal ArticleDOI
Improved circuits for the realization of switched-capacitor filters
TL;DR: In this paper, a switched-capacitor filter is presented based on a pair of complementary integrators and has transfer functions independent of parasitic capacitances between any node and ground, and design equations are given for low-pass, bandpass, high-pass and notch biquads, as well as ladder simulation filters.
Journal ArticleDOI
A Per-Channel A/D Converter Having 15-Segment µ-255 Companding
TL;DR: Relative insensitivity to circuit component variations, absence of analog gates, along with the need to generate only a few analog levels, make the 1-bit coder especially well suited to integrated circuit realization.
Journal ArticleDOI
Switched-capacitor decimation and interpolation circuits
R. Gregorian,W. Nicholson +1 more
TL;DR: In this article, switched-capacitor decimation and interpolation circuits are described, where the decimator can function as an input stage, the interpolator as an output stage in a filter system.