Proceedings ArticleDOI
A switched-capacitor DAC with analog mismatch correction
Un-Ku Moon,J. Silva,J. Steensgaard,Gabor C. Temes +3 more
- Vol. 4, pp 421-424
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TLDR
A background calibration method for enhancing the accuracy and linearity of a switched-capacitor digital-to-analog converter to achieve very high accuracy andlinearity combined with high speed.Abstract:
This paper describes a background calibration method for enhancing the accuracy and linearity of a switched-capacitor digital-to-analog converter. It can be used alone or in combination with mismatch shaping to achieve very high accuracy and linearity combined with high speed.read more
Citations
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Journal ArticleDOI
Adaptive digital correction of analog errors in MASH ADCs. II. Correction using test-signal injection
TL;DR: This paper describes the correction process, as well as some efficient structures for implementing it, and demonstrates the effectiveness of the technique by describing three design examples.
Journal ArticleDOI
A state of the art on ADC error compensation methods
TL;DR: In the paper, some ADC error compensation methods are briefly introduced according to a classification criterion based on the main research trends.
Proceedings ArticleDOI
A state of the art on ADC error compensation methods
TL;DR: In the paper, some ADC error compensation methods are briefly introduced according to a classification criterion based on the main research trends.
Journal ArticleDOI
Asynchronous level crossing analog to digital converters
TL;DR: A new class of asynchronous analog to digital converters (A-ADCs) is presented, based on an level-crossing sampling scheme of the analog signal, and an asynchronous design, which proves that the Figure of Merit (FoM) of this converter is increased and the activity is reduced.
Proceedings ArticleDOI
Digital correlation technique for the estimation and correction of DAC errors in multibit mash /spl Delta//spl Sigma/ ADCs
TL;DR: A fully digital algorithm is described for acquiring and correcting the errors of the feedback DAC used in a multibit /spl Delta//spl Sigma/ MASH ADC, which makes the design of fast and accurate ADCs using inaccurate components possible.
References
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Journal ArticleDOI
A self-calibration technique for monolithic high-resolution D/A converters
Dirk Wouter Johannes Groeneveld,Hendrikus Johannes Schouwenaars,H.A.H. Termeer,C.A.A. Bastiaansen +3 more
TL;DR: In this article, a self-calibration technique based upon charge storage on the gate-source capacitance of CMOS transistors is presented, which can produce multiple copies of a reference current.
Journal ArticleDOI
Multibit Sigma - Delta A/D converter incorporating a novel class of dynamic element matching techniques
Bosco Leung,S. Sutarja +1 more
TL;DR: A dynamic element matching technique is applied to multibit sigma-delta modulators that translates the harmonic distortion components of a nonideal digital-to-analog converter to high-frequency components, which can then be filtered out by the decimation filter.
Journal ArticleDOI
Noise-shaped multbit D/A convertor employing unit elements
Richard Schreier,B. Zhang +1 more
TL;DR: Simulations indicate that first-order, second-order and bandpass noise-shaping are all possible in the technique that enables the use of multibit feedback in delta-sigma A/D and D/A convertors.
Proceedings Article
Improved Delta-Sigma DAC Linearity Using Data Weighted Averaging.
Rex T. Baird,Terri S. Fiez +1 more
Proceedings ArticleDOI
Improved /spl Delta//spl Sigma/ DAC linearity using data weighted averaging
R.T. Baird,Terri S. Fiez +1 more
TL;DR: A new dynamic element matching (DEM) algorithm, referred to as data weighted averaging (DWA), is presented for improving DAC linearity in multi-bit delta-sigma (/spl Delta//spl Sigma/) data converters and out-performs all previously described algorithms.