Journal ArticleDOI
Active area limitation of Ge/GaAs heterojunctions by means of B ion implantation
F. Ishizuka,K. Sugioka,T. Itoh +2 more
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TLDR
In this paper, the authors investigated the active area of the Ge/GaAs heterojunction diode by means of B ion implantation into the interface of the ge/gaAs structure, and the high resistivity region was formed in the GaAs substructure.Abstract:
We have investigated the limitation of the active area of p‐n Ge/GaAs heterojunctions by means of B ion implantation into the interface of Ge/GaAs structure. Germanium epilayers were grown on (100) GaAs substrates by molecular beam epitaxy at a substrate temperature above 450 °C with a growth rate of about 10 nm/min. The Ge/GaAs heterojunction diode, fabricated with p‐n Ge/GaAs structure which was grown at the substrate temperature of 500 °C, represented a forward current voltage shoulder of 0.44 V and a breakdown voltage of 44 V. The ideality factor and the backward step recovery time of this diode was 1.09 and about 10 ns, respectively, similar to a Schottky barrier diode with same active area. In order to use the n‐GaAs substrate as an emitter of a heterobipolar transistor, it is necessary to limit the current flow into the same area of the collector through the base region. To realize this idea, B ions were implanted through the Ge epilayer, and the high‐resistivity region was formed in the GaAs subst...read more
Citations
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Journal ArticleDOI
Role of arsenic in the heteroepitaxy of Ge/GaAs
A. Leycuras,M. G. Lee +1 more
TL;DR: In this paper, it is shown that a too large surface concentration of As due to intentional doping can block the Ge growth and the density of defects as well as the thickness at which they appear are characterized by the same activation energy of ∼1 eV.
Journal ArticleDOI
Current-voltage characteristics of p -Ge/n-GaAs heterojunction diodes grown by molecular beam epitaxy
M. Kawanaka,J. Sone +1 more
TL;DR: In this paper, the conduction band discontinuity has been estimated to be 40 ± 10 meV and the best ideality factor of 1.04 over six decades of the forward current and the lowest reverse current density of the order of 10−6 A/cm2 were obtained for diodes with Ge grown at 500° C.
Patent
Compound semiconductor integrated circuit device with an element isolating region
TL;DR: In this article, the carrier capture level in an element isolating region in a semi-insulating compound semiconductor substrate is defined, which includes at least a first region of relatively low implantation concentration of the impurity and a second region with relatively high implantation concentrations of impurity.
Patent
Method for manufacturing a heterostructure transistor having a germanium layer on gallium arsenide using molecular beam epitaxial growth
TL;DR: In this article, a heterostructure bipolar transistor is formed by a process of holding an N-type gallium arsenide body using as an emitter region in a high vacuum of 10-9 torr to 10-13 torr at a first temperature of 400° C. to 1,000° C where arsenic on a surface of the gallium arsenic body drifts away, lowering the first temperature to a second temperature of 300° C to 400°C.
Journal ArticleDOI
GeAs as a novel arsenic dimer source for n‐type doping of Ge grown by molecular beam epitaxy
TL;DR: In this article, the electron concentration in the arsenic-doped Ge films depends on the GeAs cell temperature with an activation energy of 2.5 eV, which coincides with the arsenic dimer beam flux generated from GeAs.
References
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Journal ArticleDOI
Experiments on Ge-GaAs heterojunctions
TL;DR: In this article, the electrical characteristics of Ge-GaAs heterojunctions, made by depositing Ge epitaxially on GaAs substrates, are described and I-V and electro-optical characteristics are consistent with a model in which the conduction-and valence-band edges at the interface are discontinuous.
Journal ArticleDOI
AVALANCHE BREAKDOWN VOLTAGES OF ABRUPT AND LINEARLY GRADED p‐n JUNCTIONS IN Ge, Si, GaAs, AND GaP
Simon M. Sze,G. Gibbons +1 more
Journal ArticleDOI
Heterostructure bipolar transistors: What should we build?
TL;DR: Two new conceptual developments extending earlier concepts about emitter/base junction grading and an extension of permeable base transistor technology to bipolar transistors in what is called a gridded‐base bipolar transistor are proposed.
Journal ArticleDOI
Switching Time in Junction Diodes and Junction Transistors
TL;DR: In this paper, the authors derived an approximate solution for the switching transient in a representative switching circuit, where the transient is separated into two phases: a constant current phase where the flow is limited by the external resistance, and a collection phase when the current decays at a rate determined by the minority carrier lifetime and the dimensions of the diode.