Book ChapterDOI
Adaptive Power Management for Nanoscale SoC Design
Jeong-Tak Ryu,Kyung Ki Kim +1 more
- pp 437-446
Reads0
Chats0
TLDR
A novel adaptive power management system for nanoscale SoC design that reduces standby power dissipation and reduces the leakage power at least by 500 times for ISCAS’85 benchmark circuits designed using 32-nm CMOS technology comparing to the case where the method is not applied.Abstract:
The demand for power sensitive designs in system-on-chip (SoC) has grown significantly as MOSFET transistors scale down. Since portable battery powered devices such as cell phones, PDA’s, and portable computers are becoming more complex and prevalent, the demand for increased battery life will require designers to seek out new technologies and circuit techniques to maintain high performance and long operational lifetimes. As process dimensions shrink further toward nanometer technology, traditional methods of dynamic power reduction are becoming less effective due to the increased impact of standby power. Therefore, this paper proposes a novel adaptive power management system for nanoscale SoC design that reduces standby power dissipation. The proposed design method reduces the leakage power at least by 500 times for ISCAS’85 benchmark circuits designed using 32-nm CMOS technology comparing to the case where the method is not applied.read more
References
More filters
Journal ArticleDOI
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
TL;DR: Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices and different circuit techniques to reduce the leakage power consumption are explored.
Journal ArticleDOI
Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor
Takahiro Seki,Satoshi Akui,Katsunori Seno,Masakatsu Nakai,Tetsumasa Meguro,Tetsuo Kondo,Akihiko Hashiguchi,Hirokazu Kawahara,Kazuo Kumano,Masayuki Shimura +9 more
TL;DR: In this article, a dynamic voltage and frequency management (DVFM) scheme was introduced in a microprocessor for handheld devices with wideband embedded DRAM, which reduces the power consumption effectively by cooperation of the autonomous clock frequency control and the adaptive supply voltage control.
Journal ArticleDOI
Dynamic voltage and frequency management for a low-power embedded microprocessor
Masakatsu Nakai,S. Akui,Katsunori Seno,Tetsumasa Meguro,Takahiro Seki,Tetsuo Kondo,Akihiko Hashiguchi,Hirokazu Kawahara,K. Kumano,M. Shimura +9 more
TL;DR: A dynamic voltage and frequency management (DVFM) scheme with leakage power compensation effect is introduced in a microprocessor with 128-bit wideband 64-Mb embedded DRAM, achieving 82% power reduction in personal information management scheduler application and 40% power reduced in MPEG4 movie playback.
Journal ArticleDOI
Leakage Power Analysis and Reduction for Nanoscale Circuits
TL;DR: Leakage current in the nanometer regime has become a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickness scale downward.