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Multi-Threshold CMOS Digital Circuits

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The article was published on 2003-01-01. It has received 63 citations till now. The article focuses on the topics: Integrated injection logic & Mixed-signal integrated circuit.

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Design and optimization of multithreshold CMOS (MTCMOS) circuits

TL;DR: This paper presents several heuristic techniques for efficient gate clustering in multithreshold CMOS circuits by modeling the problem via bin-packing and set-partitioning techniques, and four hybrid clustering techniques that combine the BP and SP techniques to produce a more efficient solution.
Journal ArticleDOI

ULPFA: A New Efficient Design of a Power-Aware Full Adder

TL;DR: Comparisons between adders based on full adders from the prior art and the ULPFA version demonstrate that the development outperforms the static CMOS and the CPL full adder, particularly in terms of power consumption and PDP by at least a factor of two.
Journal ArticleDOI

A combined gate replacement and input vector control approach for leakage current reduction

TL;DR: A divide-and-conquer approach is presented that integrates gate replacement, an optimal MLV searching algorithm for tree circuits, and a genetic algorithm to connect the tree circuits to overcome the limitation of internal gates at high logic levels.
Journal ArticleDOI

Power gating: Circuits, design methodologies, and best practice for standard-cell VLSI designs

TL;DR: Power gating has become one of the most widely used circuit design techniques for reducing leakage current as discussed by the authors, but its application to standard-cell VLSI designs involves many careful considerations.
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