Proceedings ArticleDOI
An energy and area efficient SC SAR ADC structure based on multi level capacitor switching technique
Pranati Ghoshal,M. Moydudy,Md. Alamgir Hossain,Sunit K. Sen +3 more
- pp 574-577
TLDR
In this article, a new capacitor array structure which is both energy and area efficient is presented for a 4-bit successive approximation register (SAR) analog-to-digital converter (ADC).Abstract:
A new capacitor array structure which is both energy and area efficient is presented for a 4 bit successive approximation register (SAR) analog-to-digital converter (ADC). The proposed circuit consumes zero energy in the second and third comparison cycles. Significant lowering of energy in the different charge redistribution steps is ensured by applying different voltages in the switching scheme of the various comparison cycles. Besides energy saving to the extent of 98%, a 75% reduction in capacitance is achieved compared to the conventional method.read more
Citations
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Proceedings ArticleDOI
A 4 Bit Combinational Hybrid-Junction Splitting Technique for Realization of an Energy Efficient SC SAR ADC
TL;DR: A novel technique that combines the advantageous features of hybrid and junction splitting technique is presented for realization of a very high energy efficient SC SAR ADC which achieves a 50% reduction in unit capacitance requirements over the conventional one.
Journal ArticleDOI
A 4 bit highly energy and area efficient SC SAR ADC based on a combinational technique with reduced reset energy
TL;DR: A combinational method, based on hybrid and junction splitting techniques, is used to realize a 4 bit high energy efficient SC SAR ADC.
Journal ArticleDOI
Realization of an ultra low power and area efficient SC SAR ADC architecture using single and two step reset methods
TL;DR: In this paper, an energy and area efficient switching scheme for a 4-bit charge redistribution switch capacitor (SC) successive approximation register (SAR) analog-to-digital converter (ADC) is proposed.
Book ChapterDOI
A Low Energy and Area Efficient Switching Scheme for a Charge Redistribution SAR ADC Architecture
TL;DR: An energy and area efficient switching scheme for a 4-bit charge redistribution switch capacitor (SC) successive approximation register (SAR) analog-to-digital converter (ADC) is proposed in this article.
Proceedings ArticleDOI
Smart Switching Network based Asynchronous Binary Search ADC
TL;DR: In this paper, a binary search analog-to-digital converter based on sub-ADC was proposed. But the performance of the proposed ADC is limited by the number of comparators.
References
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Journal ArticleDOI
Merged capacitor switching based SAR ADC with highest switching energy-efficiency
TL;DR: A modified merged capacitor switching (MCS) scheme is proposed for the successive approximation register (SAR) analogue-to-digital converter (ADC) and achieves lowest switching energy among existing switching schemes.
Journal ArticleDOI
SAR ADC architecture with 98% reduction in switching energy over conventional scheme
Arindam Sanyal,Nan Sun +1 more
TL;DR: A high energy-efficiency switching scheme for a successive approximation register (SAR) analogue-to-digital converter (ADC) is presented and can achieve 98.4% savings in switching energy when compared to a conventional SAR.
Journal ArticleDOI
Energy-efficient hybrid capacitor switching scheme for SAR ADC
TL;DR: In this paper, a low-energy hybrid capacitor switching scheme for a low power successive approximation register (SAR) analogue-to-digital converter (ADC) is presented, which combines a new switch method and the monotonic technique.
Proceedings ArticleDOI
Capacitor array structure and switch control for energy-efficient SAR analog-to-digital converters
Jeongsup Lee,In-Cheol Park +1 more
TL;DR: Simulation results show that the proposed capacitor array structure and switching method can reduce the average energy consumed in the capacitor array by 75% and 60% compared to the conventional method and the splitting capacitor method, respectively.
Journal ArticleDOI
Low-energy and area-efficient switching scheme for SAR A/D converter
X. Y. Tong,W. P. Zhang,F. X. Li +2 more
TL;DR: In this paper, a high energy-efficiency switching scheme for low power successive approximation resister analogue-to-digital converter is proposed, which reduces the average switching energy and total capacitance of the proposed scheme by 97.7 and 87.5 % respectively compared to the conventional architecture.
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