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Journal ArticleDOI

Application of 2-dimensional solutions of the Shockley-Poisson equation to inversion-layer m.o.s.t. devices

H.W. Loeb, +2 more
- 23 Aug 1968 - 
- Vol. 4, Iss: 17, pp 352-354
TLDR
In this article, a model for inversion-layer m.o.t.s is outlined which avoids the usual gradual-channel approximation by the use of 2-dimensional solutions to the Shockley-Poisson and Laplace equations governing the field distribution.
Abstract
A model for inversion-layer m.o.s.t.s is outlined which avoids the usual gradual-channel approximation by the use of 2-dimensional solutions to the Shockley-Poisson and Laplace equations governing the field distribution. Computed I/V and C/V characteristics and potential-distribution; diagrams are shown for a particular device geometry.

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Citations
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Journal ArticleDOI

A charge-sheet model of the MOSFET

TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.
Journal ArticleDOI

Physics of the ferroelectric nonvolatile memory field effect transistor

TL;DR: In this article, the operation of the ferroelectric nonvolatile memory field effect transistor is theoretically examined extensively for the first time, and the theoretical results provide unique insight into the effects of geometrical and material parameters on the electrical properties of the transistor.
Journal ArticleDOI

A simple two-dimensional model for IGFET operation in the saturation region

TL;DR: In this paper, a model for an IGFET operating in saturation and accounting for the two-dimensional potential distribution in the section of the surface space-charge region adjacent to the drain is developed.
Journal ArticleDOI

Nonplanar VLSI device analysis using the solution of Poisson's equation

TL;DR: Techniques are presented for calculating the drain current of small-geometry MOSFET's in the linear, subthreshold, and punch-through regions of device operation and the solution method demonstrates good convergence characteristics and minimizes computer storage requirements.
Journal ArticleDOI

D-MOS transistor for microwave applications

TL;DR: In this article, a new n-channel silicon MOS transistor is described that can be fabricated with channel lengths of less than 1 µ by using a double-diffusion process similar to that used in bipolar transistor fabrication.
References
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Journal ArticleDOI

A Unipolar "Field-Effect" Transistor

TL;DR: In this article, the authors proposed a new form of transistor called unipolar field effect transistor, which is of the "field effect" type in which the conductivity of a layer of semiconductor is modulated by a transverse electric field.
Journal ArticleDOI

The silicon insulated-gate field-effect transistor

TL;DR: In this paper, a simple model is proposed and the basic transistor current-voltage relationships are derived for the case of a thick oxide and shallow conducting channel, and a more detailed model is subsequently proposed in order to explain some experimentally observed anomalies for units not adequately described by the simpler model.
Book

Design theory of a surface field-effect transistor

TL;DR: In this paper, the design theory of insulated gate, surface field effect transistors is presented, and it is shown that for similar dimensions the surface field-effect transistor has frequency response comparable to other fieldeffect transistors.
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