Proceedings ArticleDOI
Augmenting Functional Broadside Tests for Transition Fault Coverage with Bounded Switching Activity
Irith Pomeranz
- pp 38-44
TLDR
A procedure is described that generates broadside test sets with bounded switching activity during fast functional capture cycles based on the maximum switching activity of a functional broadsideTest set, targeting transition faults in full-scan circuits.Abstract:
For most purposes, it is sufficient for a low-power test set to ensure that the power dissipation during test application will not exceed that possible during functional operation. This is guaranteed for the fast functional capture cycles of functional broadside tests. This paper describes a procedure that generates broadside test sets with bounded switching activity during fast functional capture cycles based on the maximum switching activity of a functional broadside test set, targeting transition faults in full-scan circuits. The procedure first generates a compact functional broadside test set. It then extends the test set in steps in order to increase its fault coverage to that of an arbitrary broadside test set (a test set that includes non-functional broadside tests). During these steps, the maximum switching activity of the functional broadside test set is used for bounding the switching activity.read more
Citations
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Journal ArticleDOI
Low-Power Test Generation by Merging of Functional Broadside Test Cubes
TL;DR: Experimental results show that the procedure detects all or almost all the transition faults that are detectable by arbitrary (functional and nonfunctional) broadside tests in benchmark circuits.
Journal ArticleDOI
Signal-Transition Patterns of Functional Broadside Tests
TL;DR: This paper defines and studies the patterns of signal transitions under the second, fast functional capture cycles of functional broadside tests, which can be used for evaluating the deviations from functional power dissipation created by low-power test sets that consist of arbitrary (functional and nonfunctional) broadside Tests.
Journal ArticleDOI
Skewed-Load Test Cubes Based on Functional Broadside Tests for a Low-Power Test Set
TL;DR: The main challenge that this paper addresses is the derivation of skewed-load test cubes from functional broadside tests and considers the percentages of values that should be unspecified in the skewed- load test cubes in order to balance the need to create functional operation conditions with the need for test compaction.
Journal ArticleDOI
Simultaneous Generation of Functional and Low-Power Non-Functional Broadside Tests
TL;DR: In the low-power test generation procedure described in this paper, functional and non-functional broadside tests are generated simultaneously by the same process, which allows stricter constraints on the switching activity of non- functional broadside Tests to be satisfied.
Journal ArticleDOI
Functional Broadside Templates for Low-Power Test Generation
TL;DR: A procedure for computing functional broadside templates from completely-specifiedfunctional broadside tests, and a low-power test generation procedure for transition faults based on templates are described.
References
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Proceedings ArticleDOI
Static compaction techniques to control scan vector power dissipation
TL;DR: It is shown here that by carefully selecting the order in which pairs of test cubes are merged during static compaction, both average power and peak power for the final test set can be greatly reduced.
Journal ArticleDOI
Techniques for minimizing power dissipation in scan and combinational circuits during test application
TL;DR: Heuristics with good performance bounds can be derived for combinational circuits tested using built-in self-test (BIST) and considerable reduction in power dissipation can be obtained using the proposed techniques.
Journal ArticleDOI
Broad-side delay test
Jacob Savir,S. Patil +1 more
TL;DR: It is shown that the broad-side method is inferior to the skewed-load method, which is another form of scan-based transition test, and there is, however, a merit in combining the skewed -load method with the broad -side method to achieve a higher transition fault coverage.
Proceedings ArticleDOI
Minimizing power consumption in scan testing: pattern generation and DFT techniques
TL;DR: Case study information on ATPG- and DFT-based solutions for test power reduction is presented and ICs have been observed to fail at specified minimum operating voltages during structured at-speed testing while passing all other forms of test.
Proceedings ArticleDOI
Too much delay fault coverage is a bad thing
TL;DR: Delay fault test application via enhanced scan and skewed load techniques is shown to allow scan-based delay tests to be applied that are unrealizable in normal operation, and rather than higher coverage being a positive feature, it has negative impact on yield and designer productivity.