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Patent

Charge redistribution analog-to-digital converter with system calibration

TLDR
In this paper, an analog-to-digital converter calibration method for a charge redistribution analog to digital converter is presented, that includes adjusting an input offset of an input of the analog to the digital converter and adjusting a gain offset of the ADC.
Abstract
A charge redistribution analog-to-digital converter. This converter includes an offset correcting circuit operatively connected in parallel with a capacitor array and responsive to a sampling input of the analog-to-digital converter, and a gain correcting circuit operatively connected in parallel with a sampling capacitor and responsive to the sampling input of the analog-to-digital converter. In another general aspect, an analog-to-digital converter calibration method for a charge redistribution analog-to-digital converter, that includes adjusting an input offset of an input of the analog-to-digital converter and adjusting a gain offset of the analog-to-digital converter. The steps of adjusting are then repeated until a predetermined level of error is achieved for the analog-to-digital converter.

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Citations
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TL;DR: In this article, an error correction circuit for use with an analog-to-digital converter (ADC) comprising correction capacitance means and switching means coupled to the correction capacitor means is presented.
References
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Journal ArticleDOI

All-MOS charge-redistribution analog-to-digital conversion techniques. II

TL;DR: This second paper describes a two-capacitor successive approximation technique which, in contrast to the first, requires considerably less die area, is inherently monotonic in the presence of capacitor ratio errors, and which operates at somewhat lower conversion rate.
Journal ArticleDOI

A precision variable-supply CMOS comparator

TL;DR: In this paper, a precision CMOS voltage comparator circuit is proposed to provide stable supply-independent DC bias voltages and controlled internal voltage swings for the comparator, and an actively controlled biasing scheme has been developed to allow for differentially autozeroing the comparators for applications in differential A/D converter systems.
Patent

Self-calibrating digital to analog conversion system and method

TL;DR: In this article, a self-calibration system and method which updates the correction codes stored in the memory are also disclosed, where an output signal from a temperature sensor is connected to a digital number which is also applied to a plurality of the address inputs.
Patent

Weighted capacitor analog/digital converting apparatus and method

TL;DR: In this paper, an array of binary weighed capacitors, an additional capacitor having a capacitance value equivalent to that of the least of the binary weighted capacitors and switches for interconnecting the capacitors with certain predetermined voltage levels and the comparator, and a sequencing circuit are included.
Journal ArticleDOI

High-resolution A/D conversion in MOS/LSI

TL;DR: A new successive approximation analog-to-digital conversion technique compatible with most MOS process technologies is described, which combines a string of equal value diffused resistors and a binary ratioed capacitor array in a unique circuit configuration so that 12-bit monotonicity is achieved with only 8-bit ratio-accurate circuit elements.