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Journal ArticleDOI

CLAP: Clustered Look-Ahead Prefetching for Energy-Efficient DRAM System

Yebin Lee, +1 more
- 01 May 2016 - 
- Vol. 24, Iss: 5, pp 1770-1782
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TLDR
A prefetching-based memory traffic-clustering scheme was shown to reduce the power and energy consumption of DRAM and improve its performance by an average of 0.2%, 28.9%, and 15.7%, respectively, for memory-intensive programs.
Abstract
DRAM is one of the main sources of energy consumption in computer systems. Thus, reducing the energy consumption of DRAM can prolong the lifetime of battery-operated embedded/mobile systems. To this end, we propose a DRAM energy-aware prefetching scheme to increase row buffer hits and idle periods of DRAM by clustering its accesses. Although prefetching schemes have traditionally been used to improve the system performance, utilizing them for the energy conservation of DRAM has yet to be investigated. For such energy conservation, our scheme accurately predicts and clusters potential future DRAM accesses. Clustered DRAM accesses exploit a popular first-ready first-come first-serve memory request scheduling and a power-down mode of DRAM more effectively; the probability of row buffer hits and idle periods is significantly increased by our clustering scheme. As a result, large amounts of row activation and idle energy consumption, which are major energy consumption factors in modern DRAM, can be saved. Our prefetching-based memory traffic-clustering scheme was shown to reduce the power and energy consumption of DRAM and improve its performance by an average of 0.2%, 28.9%, and 15.7%, respectively, for memory-intensive programs.

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Citations
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EAR: ECC-aided refresh reduction through 2-D zero compression

TL;DR: A novel 2-D ZERO compression scheme is devised to increase compression coverage significantly with simple hardware support and correct bit-errors that occur when the refresh interval is lengthened to reduce refresh operations.
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RAMS: DRAM Rank-Aware Memory Scheduling for Energy Saving

TL;DR: This work proposes DRAM rank-aware memory scheduling schemes that utilize a prioritized cache block replacement method considering the power states of DRAM ranks to select victim blocks for the late level cache and two schemes that utilizes the memory controller by controlling write traffic to DRAM with the awareness of theDRAM rank states.

History-Based Memory Mode Prediction for Improving Memory Performance

TL;DR: In this article, a predictive mode control scheme is proposed to increase the bandwidth of synchronous memories that are widely adopted for high performance memory systems, by effectively managing the states of banks.
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Exploiting Inter-block Entropy to Enhance the Compressibility of Blocks with Diverse Data

TL;DR: In this paper , an entropy-based pattern compression (EPC) algorithm is proposed to generate an inter-block pattern from the same low-entropy region in numerous blocks and then compresses these blocks by using the selected pattern.
References
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Proceedings ArticleDOI

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