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Proceedings ArticleDOI

High-performance decoders for regular and irregular repeat-accumulate codes

Mohammad M. Mansour
- Vol. 4, pp 2583-2588
TLDR
In this paper, the architecture-aware regular and irregular repeat-accumulate (AARA) code design is proposed to achieve high-performance decoder design for RA codes of large block length.
Abstract
This paper investigates high-performance decoder design for regular and irregular repeat-accumulate (RA) codes of large block length. In order to achieve throughputs and bit-error rate performance that are inline with future trends in high-speed communications. high-throughput and low-power decoders of low complexity are needed. To meet such conflicting requirements for long codes, the concept of architecture-aware RA (AARA) code design is proposed. AARA code design decouples the complexity of the decoder from the owe structure by inducing structural regularity features that are amenable to efficient and scalable decoder implementations. Design methods of AARA codes with structured permuters for which an iterative decoding algorithm performs well under message-passing are analogous to those for AA LDPC codes. Algorithmic and architectural optimizations that address the latency, memory overhead, and complexity problems typical of iterative decoders for long RA codes are investigated, and a staggered decoding schedule is introduced. AARA decoders using the proposed schedule have substantial advantage over serial and parallel RA decoders.

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Citations
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Patent

Low density parity check decoder for regular LDPC codes

TL;DR: In this paper, a method and system for decoding low density parity check (LDPC) codes is presented, which includes an R select unit, a Q message first-in first-out (FIFO) memory, and a cyclic shifter.
Journal ArticleDOI

Design of LDPC Codes: A Survey and New Results

TL;DR: The EXIT chart technique for determining (near-)optimal degree distributions for LDPC code ensembles is summarized and the simplicity of representing codes by protographs is demonstrated and how this naturally leads to quasi-cyclic LDPC codes.
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LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing

TL;DR: In this paper, the edge messages with respect to the bit nodes and the edge message with regard to the check nodes may be updated simultaneously and in parallel to one another, by constructing executing orders that direct the sequence of simultaneous operation of updating the edges at both nodes types (e.g., edge and check).
Journal ArticleDOI

Structured IRA Codes: Performance Analysis and Construction

TL;DR: A simple ensemble estimate of the level of the error-rate floor of finite-length IRA codes on the additive white Gaussian noise channel is presented, which provides guidance on the choice of IRA code column weights which yield low floors.
Patent

AMP (Accelerated Message Passing) decoder adapted for LDPC (Low Density Parity Check) codes

TL;DR: In this paper, the authors presented an approach for decoding low density parity check (LDPC) codes in a more efficient, faster, and less computationally intensive manner, where soft bit information, generated from decoding a higher layer square sub-matrix of a parity check matrix of the LDPC code, is employed to assist in the decoding of other square submatrices in subsequent layers.
References
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Book

Low-Density Parity-Check Codes

TL;DR: A simple but nonoptimum decoding scheme operating directly from the channel a posteriori probabilities is described and the probability of error using this decoder on a binary symmetric channel is shown to decrease at least exponentially with a root of the block length.
Proceedings ArticleDOI

Near Shannon limit error-correcting coding and decoding: Turbo-codes. 1

TL;DR: In this article, a new class of convolutional codes called turbo-codes, whose performances in terms of bit error rate (BER) are close to the Shannon limit, is discussed.
Journal ArticleDOI

Optimal decoding of linear codes for minimizing symbol error rate (Corresp.)

TL;DR: The general problem of estimating the a posteriori probabilities of the states and transitions of a Markov source observed through a discrete memoryless channel is considered and an optimal decoding algorithm is derived.