Proceedings ArticleDOI
Impact of current distribution on RRAM array with high and low I on /I off devices
V Mohammed Zackriya,Albert Chin,Harish M. Kittur +2 more
- pp 156-157
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TLDR
Using novel circuit design topology to include the sneak path current as a reference input, the performance of two RRAM devices with I-on-I-off performance of 26 and 925 were compared for crosspoint array.Abstract:
Using novel circuit design topology to include the sneak path current as a reference input, the performance of two RRAM devices with I on /I off of 26 and 925 were compared for crosspoint array. The RRAM with better current distribution outperforms the RRAM with 36X higher I on /I off , on crosspoint array. Thus, the RRAM devices should aim on tightening the current distribution, where high I on /I off also consumes high power on circuit.read more
Citations
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Journal ArticleDOI
All Nonmetal Resistive Random Access Memory.
Te Jui Yen,A. A. Gismatulin,Vladimir A. Volodin,Vladimir A. Volodin,Vladimir A. Gritsenko,Vladimir A. Gritsenko,Vladimir A. Gritsenko,Albert Chin +7 more
TL;DR: A novel RRAM device with no metal inside is demonstrated, the N+-Si/SiOx/P+- Si combination forms a N+IP+ diode structure that is different from traditional MIM RRAM.
Journal ArticleDOI
High Performance All Nonmetal SiNx Resistive Random Access Memory with Strong Process Dependence
TL;DR: The SiNx RRAM device developed using PVD has a large resistance window that is larger than 104 and exhibits good endurance to 105 cycles under switching pulses of 1 μs and a retention time of 104 s at 85 °C.
Journal ArticleDOI
An Offset Readout Current Sensing Scheme for One-Resistor RRAM-Based Cross-Point Array
You-Da Chen,Albert Chin +1 more
TL;DR: In this paper, the authors proposed an innovative readout scheme that can fully offset the sneak-path currents in one-resistor (1R) RRAM array, which is the largest array among simple 1R RRAM, without using a selector device or extra transistor.
Proceedings ArticleDOI
Technologies Toward Three-Dimensional Brain-Mimicking IC Architecture
Albert Chin,You-Da Chen +1 more
TL;DR: The three-dimensional (3D) IC is pioneered, device-level high-mobility nMOS on VLSI backend, unipolarnMOS logic with CMOS-like ultra-low DC power, narrow distribution RRAM, and high-speed ferroelectric nMos memory are the enabling technologies toward brain-mimicking IC architecture.
References
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Proceedings ArticleDOI
A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
TL;DR: A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage, which enables fast operation over a wide common-mode and supply voltage range as discussed by the authors.
Proceedings ArticleDOI
High performance ultra-low energy RRAM with good retention and endurance
TL;DR: In this paper, a novel RRAM of 0.3 µW set power (0.1 µA at 3 V), 0.6 nW reset power (−0.3 nA at −1.8 V), fast 20 ns switching time, ultra-low 6 fJ switching energy, large 7×102 resistance window for 104 sec retention at 125°C, and 106 cycling endurance were measured simultaneously.
Journal ArticleDOI
$\hbox{Ni/GeO}_{x}\hbox{/TiO}_{y}\hbox{/TaN}$ RRAM on Flexible Substrate With Excellent Resistance Distribution
TL;DR: In this paper, high-performance Ni/GeOx/TiOy/TaN resistive random access memory on low-cost flexible plastics, with low 30-μW switching power (9 μA at 3 V; - 1μA at -3 V), 105 cycling endurance, and good retention at 85°C.
Journal ArticleDOI
On the Optimal ON/OFF Resistance Ratio for Resistive Switching Element in One-Selector One-Resistor Crosspoint Arrays
Leqi Zhang,Stefan Cosemans,Dirk Wouters,Guido Groeseneken,Malgorzata Jurczak,Bogdan Govoreanu +5 more
TL;DR: This letter investigates the impact of resistive switching element (RSE) parameters on the read performance of a two-terminal one-selector one-resistor cell.
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