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Low-Power VLSI Circuits and Systems

Ajit Pal
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TLDR
A comparison study of MOS Fabrication Technology and Low Power Software Approaches found that MOS Combinational Circuits outperforms conventional MOS Circuits in terms of power dissipation and efficiency.
Abstract
Introduction.- MOS Fabrication Technology.- MOS Transistors.- MOS Inverters.- MOS Combinational Circuits.- Sources of Power Dissipation.- Supply Voltage Scaling for Low Power.- Switched Capacitance Minimization.- Leakage Power Minimization.- Adiabatic Logic Circuits.- Battery-Aware Systems.- Low Power Software Approaches.

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Citations
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Journal ArticleDOI

Design of a Scalable Low-Power 1-Bit Hybrid Full Adder for Fast Computation

TL;DR: Based on the simulation results, it can be stated that the proposed hybrid FA circuit is an attractive alternative in the data path design of modern high-speed Central Processing Units.
Journal ArticleDOI

Review of Circuit Level Leakage Minimization Techniques in CMOS VLSI Circuits

TL;DR: A general review of the state-of-the-art circuit level leakage minimization techniques since 1995 is presented and conceptually classifies the different techniques for leaking power dissipation.
Journal ArticleDOI

Low power design for future wearable and implantable devices

TL;DR: A path towards battery-less computing is drawn by looking at device circuit co-design for future system-on-chips (SoCs) in an extremely low power mode by lowering the supply voltage utilizing low-voltage design techniques.
Proceedings ArticleDOI

A Novel Hybrid Full Adder Based on Gate Diffusion Input Technique, Transmission Gate and Static CMOS Logic

TL;DR: The proposed technique for FA design removes the defect of voltage degradation in GDI technique and low drivability of TG based design by utilizing C-CMOS logic in the output terminals.
Journal ArticleDOI

Comprehensive study of 1-Bit full adder cells: review, performance comparison and scalability analysis

TL;DR: The main finding of this research is that the single-bit performance parameters of FA cells should not be considered as the main basis for performance comparison and any FA cell should be analyzed in a multi-bit structure to determine its practical effectiveness.