Journal ArticleDOI
Low‐temperature deposition of high‐quality silicon dioxide by plasma‐enhanced chemical vapor deposition
J. Batey,E. Tierney +1 more
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TLDR
In this paper, the authors used very low flow rates of reactive gases, together with a much higher flow of inert carrier gas to ensure uniformity and reproducible properties of silicon dioxide films.Abstract:
Thin films of high‐quality silicon dioxide have been deposited at low temperatures by plasma‐enhanced chemical vapor deposition. A deposition rate much lower than that used in conventional plasma‐enhanced processes is found to be crucial in obtaining material with reproducible, good properties. Controlled, slow deposition is achieved by using very low flow rates of reactive gases, together with a much higher flow of inert carrier gas to ensure uniformity. Films deposited at usual high deposition rates (∼500 A/min) exhibit irreproducible and poor electrical properties and are porous. Those deposited slowly (∼60 A/min) have very reproducible properties, are relatively dense and exhibit very good electrical integrity. Oxides deposited using a substrate temperature of 350 °C compare favorably with those deposited at 700°C using atmospheric‐pressure chemical vapor deposition and can be deposited routinely over a wide range of oxide thickness. Deposition at 275 °C results in similar properties but with increase...read more
Citations
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Journal ArticleDOI
Heterojunction bipolar transistors using Si-Ge alloys
TL;DR: In this article, the authors discuss the growth and properties of pseudomorphic Si/sub 1-x/Ge/sub x/ structures and then focus on their applications, especially the Si-sub 1 -x/ge/sub X/-base heterojunction bipolar transistor (HBT).
Journal ArticleDOI
Silicon-germanium base heterojunction bipolar transistors by molecular beam epitaxy
TL;DR: In this paper, the collector current of a 1000-AA base device containing 12% germanium was measured at room temperature, while a 1000 times increase was observed to 90 K. This was consistent with a bandgap shrinkage in the base of 50 meV.
Journal ArticleDOI
SiGe-channel heterojunction p-MOSFET's
S. Verdonckt-Vandebroek,Emmanuel F. Crabbe,Bernard S. Meyerson,David L. Harame,Phillip J. Restle,J.M.C. Stork,Jeffrey B. Johnson +6 more
TL;DR: In this paper, the p-channel SiGe MOSFETs with SiGe channels have acceptable short-channel behavior at 0.20 /spl mu/m channel lengths and are preferable to p/sup +/ polysilicon-gate p-MOSFTs for 2.5 V operation.
Journal ArticleDOI
A Materials Roadmap to Functional Neural Interface Design
Steven M. Wellman,James R. Eles,Kip A. Ludwig,John P. Seymour,Nicholas J. Michelson,William E. McFadden,Alberto L. Vazquez,Takashi D. Y. Kozai +7 more
TL;DR: The interdependence of different electrode components is highlighted to demonstrate the current material‐based challenges facing the field of neural interface engineering.
Patent
Fabricating a semiconductor device with low defect density oxide
TL;DR: In this paper, low defect density oxides suitable for use as thin gate oxides or in charge storage capacitors are described, where the first and second layers are formed on a substrate with misaligned defect structures.
References
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Mos (Metal Oxide Semiconductor) Physics and Technology
TL;DR: In this article, the authors present a method for extracting interface trap properties from the conductance of a metal oxide Silicon Capacitor at intermediate and high frequency intervals, and demonstrate that these properties can be used for charge trapping in the oxide.
MOS /metal oxide semiconductor/ physics and technology
TL;DR: In this article, the authors present a method for extracting interface trap properties from the conductance of a metal oxide Silicon Capacitor at intermediate and high frequency intervals, and demonstrate that these properties can be used for charge trapping in the oxide.
Journal ArticleDOI
Fowler‐Nordheim Tunneling into Thermally Grown SiO2
M. Lenzlinger,E. H. Snow +1 more
TL;DR: In this article, the relative effective mass in the forbidden energy gap was found to be about 0.4, which is lower by a factor of five to ten than the expected values, probably due to trapping effects.
Journal ArticleDOI
Charge trapping instabilities in amorphous silicon‐silicon nitride thin‐film transistors
TL;DR: The most important instability mechanism in amorphous silicon-silicon nitride thin-film transistors is charge trapping in the silicon nitride layer, which leads to a threshold voltage shift (ΔVT).
Journal ArticleDOI
Deposition of silicon dioxide and silicon nitride by remote plasma enhanced chemical vapor deposition
TL;DR: Remote plasma enhanced CVD (RPECVD) as discussed by the authors is a low temperature process for the deposition of thin films of silicon dioxide and silicon nitride, which consists of four steps: (a) excitation of an oxygen or nitrogen-containing molecule in an RF plasma; (b) transport of the excited oxygen/nitrogen species out of the plasma region; (c) mixing of the transported excited species with silane (or disilane), and (d) a CVD reaction at a heated substrate to form the desired thin film.