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Proceedings ArticleDOI

Matching performance of current mirrors with arbitrary parameter gradients through the active devices

Mao-Feng Lan, +1 more
- Vol. 1, pp 555-558
TLDR
In this paper, the effects of threshold gradients at any angle across a die and through active devices on the matching characteristics of current mirrors are discussed, and a CAD tool that predicts performance of arbitrary layouts under arbitrary parameter gradients is introduced.
Abstract
Effects of threshold gradients at any angle across a die and through active devices on the matching characteristics of current mirrors are discussed. Results show a major improvement but also an unreported limitation in performance of common-centroid layouts. A CAD tool that predicts performance of arbitrary layouts under arbitrary parameter gradients is introduced.

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Citations
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Journal ArticleDOI

Current Mirror Layout Strategies for Enhancing Matching Performance

TL;DR: In this article, the authors proposed new current mirror layout strategies to reduce the matching sensitivity to the linear parameter gradients, and compared the performance of new and existing layouts for threshold voltage gradients at arbitrary angles through the active area simulation results show a significant improvement in matching characteristics of the proposed structures over what is achievable with existing layout techniques in demanding applications.
Proceedings ArticleDOI

A new current mirror layout technique for improved matching characteristics

TL;DR: A new current mirror layout technique is proposed to improve matching characteristics in the presence of parameter gradient to show a significant improvement in matching characteristics over what is achievable with existing layout techniques.
Journal ArticleDOI

Fault-tolerant training of neural networks in the presence of MOS transistor mismatches

TL;DR: A new paradigm of noise injection during training for the reduction of performance degradation is presented, where variations at the outputs of analog neural network circuitry are modeled based on the transistor-level mismatches occurring between identically designed transistors.
Proceedings ArticleDOI

Gradient sensitivity reduction in current mirrors with non-rectangular layout structures

TL;DR: Results show that in some applications, significant improvement in matching characteristics with the proposed non-rectangular structures over what is achievable with conventional layout techniques can be achieved.

Micromechanical Resonators for Low-Power, Low-Voltage Systems

TL;DR: In this paper, the authors designed, fabricated and characterized complementary metal oxide semiconductor (CMOS) integrated micro-electromechanical systems (MEMS) with the goal of enabling the full monolithic integration of the MEMS devices with the CMOS circuits, without experiencing the functionality and performance losses on either sides.
References
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Journal ArticleDOI

Matching properties of MOS transistors

TL;DR: In this paper, the matching properties of the threshold voltage, substrate factor, and current factor of MOS transistors have been analyzed and measured, and the matching results have been verified by measurements and calculations on several basic circuits.
Proceedings ArticleDOI

Measurement and modeling of MOS transistor current mismatch in analog IC's

TL;DR: The new methodology is based on extracting the mismatch information from a fully functional circuit rather than on probing individual devices; this extraction leads to more efficient and more accurate mismatch measurement.
Proceedings ArticleDOI

Manufacturability of low power CMOS technology solutions

TL;DR: This paper discusses manufacturabilty of state-of-the-art low power technologies, reporting the results on two generations of bulk CMOS technologies, triple-well CMOS and Thin Film Silicon on Insulator technologies.
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