Patent
Method for reduction of reverse short channel effect in MOSFET
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TLDR
In this article, the authors describe a manufacturing method for MOSFET devices that are free from reverse short channel effect usually found in such devices made by prior art processes, in contrast to the prior art process sequence, the channel implant is made after the source and drain already formed by implantation and its damage already annealed out.Abstract:
This invention describes a manufacturing method for MOSFET devices that are free from reverse short channel effect usually found in such devices made by prior art processes. In contrast to the prior art process sequence, the channel implant is made after the source and drain already formed by implantation and its damage already annealed out. The enhanced diffusion of the channel implant, caused by damage generated point defects and responsible for the reverse short channel effect, is therefore avoided. The channel implantation uses high energy ions to penetrate through the polysilicon gate, forming a threshold voltage adjustment and punch-through barrier layer under the gate. The channel implant through the source/drain regions is deeper than the source/drain junctions so that the junction capacitance is reduced in comparison with the prior art.read more
Citations
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References
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Proceedings ArticleDOI
Explanation of reverse short channel effect by defect gradients
Conor S. Rafferty,H.-H. Vuong,S.A. Eshraghi,Martin D. Giles,M.R. Pinto,Steven James Hillenius +5 more
TL;DR: In this paper, a coupled defect/impurity diffusion model was proposed to predict RSCE in transistors with very shallow or flat channel profiles, where diffusion broadening cannot be the mechanism.
Patent
Mosfet with gate-penetrating halo implant
TL;DR: In this paper, a halo implant is performed with sufficient energy that the implant penetrates the gate structures to below the transistor channel regions, and the resulting transistor exhibits enhanced breakdown voltage characteristics during both on and off conditions.
Patent
Method of making self-aligned MOSFET
TL;DR: In this paper, a polysilicon spacer is formed on the edges of the gate electrode forming a gate structure with a cavity, and a fully overlapped Light-Doped-Drain structure is used to improve device characteristics.
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Fabrication method of semiconductor device containing n- and p-channel MOSFETs
TL;DR: In this paper, a patterned resist mask is formed on an active region and an isolation insulator mask is constructed on an interlayer insulator film, exposing the source and drain regions of the active region.
Proceedings ArticleDOI
Evidence of channel profile modification due to implantation damage studied by a new method, and its implication to reverse short channel effects of nMOSFETs
TL;DR: In this article, the reverse short channel effect (RSCE) is observed as an increase of threshold voltage (Vth) with shorter gate length, which is important not only for sub-micron MOSFET process design but also for understanding basic phenomena which occur in the submicron region.