S
Steven James Hillenius
Researcher at Alcatel-Lucent
Publications - 60
Citations - 1364
Steven James Hillenius is an academic researcher from Alcatel-Lucent. The author has contributed to research in topics: CMOS & Gate oxide. The author has an hindex of 24, co-authored 60 publications receiving 1362 citations. Previous affiliations of Steven James Hillenius include Bell Labs & Avago Technologies.
Papers
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Proceedings ArticleDOI
The Vertical Replacement-Gate (VRG) MOSFET: a 50-nm vertical MOSFET with lithography-independent gate length
J.M. Hergenrother,Don Monroe,F.P. Klemens,G. R. Weber,William M. Mansfield,M.R. Baker,Frieder H. Baumann,K. Bolan,J.E. Bower,N.A. Ciampa,R. Cirelli,J.I. Colonell,D. J. Eaglesham,J. Frackoviak,H.-J. Gossmann,Martin L. Green,Steven James Hillenius,C. A. King,Rafael N. Kleiman,W.Y.C. Lai,J.T.-C. Lee,R. Liu,H.L. Maynard,M.D. Morris,Sang Hyun Oh,C.S. Pai,Conor S. Rafferty,J. Rosamilia,T.W. Sorsch,H.-H. Vuong +29 more
TL;DR: In this article, the Vertical Replacement Gate (VRG) MOSFET was proposed, which combines a gate length controlled precisely through a deposited film thickness, independently of lithography and etch, and a high quality gate oxide grown on a single-crystal Si channel.
Proceedings ArticleDOI
Low leakage, ultra-thin gate oxides for extremely high performance sub-100 nm nMOSFETs
Gregory Timp,Aditya Agarwal,Frieder H. Baumann,T. Boone,M. Buonanno,R. Cirelli,Vincent M. Donnelly,Majeed A. Foad,D. Grant,Martin L. Green,H.-J. Gossmann,Steven James Hillenius,J. Jackson,Dale Conrad Jacobson,Rafael N. Kleiman,F.P. Klemens,J.T.-C. Lee,William M. Mansfield,S. Moccio,A. Murrell,M. L. O’Malley,J. Rosamilia,J. Sapjeta,P.J. Silverman,T.W. Sorsch,W.W. Tai,Donald M. Tennant,H.-H. Vuong,B. E. Weir +28 more
TL;DR: In this article, the authors demonstrate that I/sub Dsat/ deteriorates for gate oxides thicker or thinner than this, and they also show that the performance of sub-100 nm nMOSFETs deteriorates with gate oxide thickness of 1-2 nm.
Proceedings ArticleDOI
Explanation of reverse short channel effect by defect gradients
Conor S. Rafferty,H.-H. Vuong,S.A. Eshraghi,Martin D. Giles,M.R. Pinto,Steven James Hillenius +5 more
TL;DR: In this paper, a coupled defect/impurity diffusion model was proposed to predict RSCE in transistors with very shallow or flat channel profiles, where diffusion broadening cannot be the mechanism.
Journal ArticleDOI
Multigigahertz CMOS dual-modulus prescaler IC
TL;DR: In this paper, a low power CMOS dual-modulus (Divide-by-128/129) prescaler IC is described, which optimizes simultaneously the characteristics of both the p-channel and n-channel transistors for low power supply voltage operation.
Journal ArticleDOI
Anomalous C-V characteristics of implanted poly MOS structure in n/sup +//p/sup +/ dual-gate CMOS technology
TL;DR: In this paper, the C-V characteristics of arsenic-doped polysilicon have been investigated with quasistatic and high-frequency capacitors and conductance measurements of various capacitors.