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Journal ArticleDOI

Piecewise approximate circuit simulation

Chandu Visweswariah, +1 more
- Vol. 10, Iss: 7, pp 861-870
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TLDR
The SPECS simulator as discussed by the authors is a piecewise approximate, tree/link based, event driven, variable accuracy circuit simulation algorithm that uses table models for device evaluation and can be built at various levels of accuracy.
Abstract
Conventional circuit simulation methods are inflexible and slow, especially for large circuits. Piecewise approximate circuit simulation, an alternative that can be more efficient and allows variable accuracy in the simulation process, is discussed. Thus, the tradeoff between accuracy and CPU time is in the hands of the user. SPECS (simulation program for electronic circuits and systems) is the prototype implementation of a piecewise approximate, tree/link based, event driven, variable accuracy circuit simulation algorithm that uses table models for device evaluation. The models can be built at various levels of accuracy, and concomitant levels of precision are reflected in the simulation results. SPECS has been benchmarked on some large, industrial circuits and has proven to be an efficient and reliable simulator. However, it suffers a penalty in run time while simulating stiff circuits, or circuits with a wide range of time constants. The authors present enhanced algorithms used in SPECS to ensure efficient steady-state computation for stiff circuits. >

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Citations
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References
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Journal ArticleDOI

The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits

TL;DR: Sufficient conditions for convergence of the WR method are proposed and examples in MOS digital integrated circuits are given to show that these conditions are very mild in practice.
Journal ArticleDOI

Large-Signal Behavior of Junction Transistors

TL;DR: In this paper, a generalized two-terminal-pair theory of junction transistors is presented which is applicable, on a dc basis, in all regions of operation, and the transition of the transistor switch from open to closed, or vice versa, is discussed, including the effects of minority carrier storage.
Journal ArticleDOI

Algorithms for ASTAP--A network-analysis program

TL;DR: This paper describes how variable-order implicit integration, tableau formulation, and sparse-matrix solution methods have been implemented in the ASTAP program.
Journal ArticleDOI

MOTIS-An MOS timing simulator

TL;DR: In this paper, a new circuit simulator is described which combines the gate-to-gate signal propagation technique used in logic simulators with detailed device representation and circuit analysis at the gate level.
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