Plasticine: A Cross-layer Approximation Methodology for Multi-kernel Applications through Minimally Biased, High-throughput, and Energy-efficient SIMD Soft Multiplier-divider
TLDR
In this article, the use of SIMD components in Field-Programmable GAssembles has been studied for error-resilient programs intertwined with their quest for high throughput.Abstract:
The rapid evolution of error-resilient programs intertwined with their quest for high throughput has motivated the use of Single Instruction, Multiple Data (SIMD) components in Field-Programmable G...read more
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RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency
TL;DR: RAPID as mentioned in this paper is the first pipelined approximate multiplier and divider architecture, customized for FPGAs, which efficiently utilizes 6-input Look-up Tables (6-LUTs) and fast carry chains to implement Mitchell's approximate algorithms.
Journal ArticleDOI
RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency
TL;DR: RAPID, the first pipelined approximate multiplier and divider architectures, customized for FPGAs is proposed, which has negligible overhead over the baseline Mitchell’s approach, but also boosts its accuracy to 99.4% for arbitrary size of multiplication and division.
References
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PhysioBank, PhysioToolkit, and PhysioNet: components of a new research resource for complex physiologic signals.
Ary L. Goldberger,Luís A. Nunes Amaral,Leon Glass,Jeffrey M. Hausdorff,Plamen Ch. Ivanov,Roger G. Mark,Joseph E. Mietus,George B. Moody,Chung-Kang Peng,H. Eugene Stanley +9 more
TL;DR: The newly inaugurated Research Resource for Complex Physiologic Signals (RRSPS) as mentioned in this paper was created under the auspices of the National Center for Research Resources (NCR Resources).
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Explaining nonlinear classification decisions with deep Taylor decomposition
TL;DR: A novel methodology for interpreting generic multilayer neural networks by decomposing the network classification decision into contributions of its input elements by backpropagating the explanations from the output to the input layer is introduced.
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Measuring the Gap Between FPGAs and ASICs
Ian Kuon,Jonathan Rose +1 more
TL;DR: Experimental measurements of the differences between a 90- nm CMOS field programmable gate array (FPGA) and 90-nm CMOS standard-cell application-specific integrated circuits (ASICs) in terms of logic density, circuit speed, and power consumption for core logic are presented.
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Computer Multiplication and Division Using Binary Logarithms
TL;DR: A method of computer multiplication and division is proposed which uses binary logarithms and an error analysis is given and a means of reducing the error for the multiply operation is shown.
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Design of Power and Area Efficient Approximate Multipliers
TL;DR: Synthesis results reveal that two proposed multipliers achieve power savings of 72% and 38%, respectively, compared to an exact multiplier, and have better precision when compared to existing approximate multipliers.