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Journal ArticleDOI

Surface effect as a limitation on the performance of polycrystalline Si thin‐film transistors

K. T‐Y. Kung, +1 more
- 15 Mar 1988 - 
- Vol. 63, Iss: 6, pp 2131-2135
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TLDR
In this paper, the average grain size and the fiber texture of a polycrystalline Si film could affect the performance of metaloxide-semiconductor thin-film transistors fabricated in the film.
Abstract
In a previous article [J. Appl. Phys. 62, 1503 (1987)], we demonstrated how the average grain size and the {110} fiber texture of a polycrystalline Si film could affect the performance of metal‐oxide‐semiconductor thin‐film transistors fabricated in the film. We showed that, for grain sizes of the order of 1–2 μm, a strong {110} texture was more effective than a larger average grain size in improving the threshold voltages and field‐effect carrier mobilities of both the n‐ and p‐channel transistors fabricated. In this article, we propose an interpretation of these results, and offer supporting evidences, to relate the crystallographic texture of a polycrystalline Si film to thin‐film transistor performance. We show that a {110}‐oriented surface exhibits less surface effect than a randomly oriented surface on average and, consequently, it is more desirable for thin‐film transistor applications.

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Citations
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Journal ArticleDOI

Polycrystalline silicon thin films processed with silicon ion implantation and subsequent solid-phase crystallization: Theory, experiments, and thin-film transistor applications

TL;DR: In this article, a review of the self-implantation method for polycrystalline silicon thin transistors is presented, and the mechanism of selective amorphization by the silicon self implantation and the crystallization by thermal annealing is discussed.
Book ChapterDOI

Ion Beam Processing for Silicon-on-Insulator

TL;DR: In this paper, the authors proposed the use of ion beam processing in modern semiconductor technology in the area of VLSI and ULSI (Ultra Large Scale Integration) in order to produce integrated circuits of high packing density, low power consumption and high speed.
Journal ArticleDOI

Characteristics of then film transistors fabricated in polysilicon films deposited by plasma enhanced chemical vapor deposition

TL;DR: In this article, thin-film transistors (TFTs) fabricated in polysilicon films deposited by plasma enhanced chemical vapor deposition (PECVD) have been characterized, and the transistors were fabricated using a low temperature process (i.e., <- 700° C).
Dissertation

Polycrystalline Si thin films and devices : I. Seed selection through ion channeling II. Thin-film transistors

TL;DR: The overall results obtained demonstrate that, by optimizing the implant dose, one can produce strong fiber-textured polycrystalline Si films on Si0 2, and it was shown that the grain-size enlargement (achieved through amorphization-crystallization) can lead to significant improvements in the device characteristics.
References
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Journal ArticleDOI

The electrical properties of polycrystalline silicon films

TL;DR: In this article, Boron doses of 1×1012-5×1015/cm2 were implanted at 60 keV into 1-μm-thick polysilicon films and Hall and resistivity measurements were made over a temperature range −50-250 °C.
Journal ArticleDOI

Hall Mobility in Chemically Deposited Polycrystalline Silicon

TL;DR: In this article, the authors performed Hall mobility measurements on polycrystalline silicon films with and without doping impurities added during deposition or by diffusion from a doped vapordeposited oxide.
Journal ArticleDOI

Evidence for surface asperity mechanism of conductivity in oxide grown on polycrystalline silicon

TL;DR: In this article, the presence of the asperities is strongly correlated with the oxide conductivity, as controlled by the oxidation temperature of polycrystalline silicon, and direct evidence of these asperity is shown in SEM micrographs.
Journal ArticleDOI

Surface-State Related l/f Noise in p-n Junctions and MOS Transistors

TL;DR: In this paper, it was shown that l/f noise in silicon pn junctions and in MOS transistors can be increased by the introduction of a particular type of surface state.
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We show that a {110}‐oriented surface exhibits less surface effect than a randomly oriented surface on average and, consequently, it is more desirable for thin‐film transistor applications.