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Journal ArticleDOI

Polycrystalline silicon thin films processed with silicon ion implantation and subsequent solid-phase crystallization: Theory, experiments, and thin-film transistor applications

TLDR
In this article, a review of the self-implantation method for polycrystalline silicon thin transistors is presented, and the mechanism of selective amorphization by the silicon self implantation and the crystallization by thermal annealing is discussed.
Abstract
A review is presented of the self‐implantation method which has been developed to achieve high‐quality polycrystalline silicon thin films on insulators with enhanced grain sizes and its applications to thin‐film transistors (TFTs). In this method, silicon ions are implanted into an as‐deposited polycrystalline silicon thin film to amorphize most of the film structure. Depending on ion implantation conditions, some seeds with 〈110〉 orientation remain in the film structure due to channeling. The film is then thermally annealed at relatively low temperatures, typically in the range of 550–700 °C. With optimized process conditions, average grain sizes of 1 μm or greater can be obtained. First, an overview is given of the thin‐film transistor technology which has been the greatest motivation for the research and development of the self‐implantation method. Then the mechanism of selective amorphization by the silicon self‐implantation and the crystallization by thermal annealing is discussed. An analytical mode...

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Citations
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Journal ArticleDOI

3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration

TL;DR: This paper analyzes the limitations of the existing interconnect technologies and design methodologies and presents a novel three-dimensional chip design strategy that exploits the vertical dimension to alleviate the interconnect related problems and to facilitate heterogeneous integration of technologies to realize a system-on-a-chip (SoC) design.
Journal ArticleDOI

Polycrystalline silicon thin film transistors

TL;DR: In this paper, a-Si precursors are used for the preparation of the material by direct deposition and by crystallization from pre-deposition precursor, and the characterization of the defect-induced trapping states within the material and their passivation is presented.
Journal ArticleDOI

Controlled Super‐Lateral Growth of Si Films for Microstructural Manipulation and Optimization

TL;DR: In this paper, a particular form of pulsed-laser-based thin-film crystallization method referred to as controlled super-lateral growth (C-SLG) is presented.
Journal ArticleDOI

Crystalline Si Films for Integrated Active-Matrix Liquid-Crystal Displays

James S. Im, +1 more
- 01 Mar 1996 - 
TL;DR: In this article, the authors proposed a system-on-glass (SOC) display architecture, in which the entire electronic circuitry needed for a product is incorporated directly onto a glass substrate.
Proceedings ArticleDOI

Multiple Si layer ICs: motivation, performance analysis, and design implications

TL;DR: It is shown that significant improvement in performance and reduction in wire-limited chip area can be achieved with 3-D ICs with vertical inter-layer interconnects (VILICs), and it is demonstrated that using a thermally responsible design and/or a high-performance heat sinking technology, die temperatures can be reduced well below present die temperatures.
References
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Journal ArticleDOI

The electrical properties of polycrystalline silicon films

TL;DR: In this article, Boron doses of 1×1012-5×1015/cm2 were implanted at 60 keV into 1-μm-thick polysilicon films and Hall and resistivity measurements were made over a temperature range −50-250 °C.
Journal ArticleDOI

Encyclopedia of Applied Physics

TL;DR: The 23-volume "Encyclopedia of Applied Physics" seeks to demonstrate the synergy between physics and technological applications as discussed by the authors, and provides a broad overview of the main aspects of physics and their applications.
Journal ArticleDOI

Conductivity behavior in polycrystalline semiconductor thin film transistors

TL;DR: In this article, the effect of thermal annealing on implanted and unimplanted CdSe TFTs has been studied and the model appears to give a general description of the conductivity behavior in polycrystallin...
Journal ArticleDOI

Substrate‐orientation dependence of the epitaxial regrowth rate from Si‐implanted amorphous Si

TL;DR: Amorphous layers, approximately 4000 A thick, were formed on single-crystal Si samples by implantation of 28Si ions at LN2 substrate temperature as mentioned in this paper, where channeling effect measurements with MeV 4He ions were used to measure the thickness of the amorphous layers and to measure subsequent epitaxial regrowth on the underlying crystalline substrates.
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