Showing papers on "Etching (microfabrication) published in 1973"

Optical waveguides in GaAs–AlGaAs epitaxial layers

Abstract: Optical transmission properties are described for two types of waveguides formed in AlxGa1−xAs–GaAs–Alx Ga1−xAs epitaxial layers. The first consists of long smooth‐walled mesas formed by a masking and etching procedure and the second are obtained using an additional etching step to selectively etch the GaAs layer. The latter structure is potentially useful in forming active devices such as modulators since this structure is self‐masking for contacting of the top layer by conventional evaporation techniques. The waveguide dimensions are typically 1–30 μm wide, [sine wave] 1 μm thick, and several mm in length. The transmission measurements are quite similar for both types of guides with attenuation as low as [inverted lazy s]2 cm−1 in wide ([inverted lazy s]20 μm) guides but with losses increasing with decreasing width. The loss appears to arise from imperfections and compositional inhomogeneities in the epitaxial layers.

Method of making a semiconductor device utilizing a light-sensitive etching agent

Abstract: A light-sensitive etching agent comprising (a) a photodecomposable compound forming upon decomposition a material capable of etching a silicon compound containing film or capable of etching the film after reaction with another material, (b) a material capable of forming water upon exposure to light, (c) a binder and (d) a solvent, and a method of making a semiconductor device utilizing the light-sensitive etching agent.

Ion microprobe analyzer

Abstract: An ion microprobe analyzer adapted for use in effecting the solid analysis of a specimen in the depth direction thereof in such a manner that the specimen is scanned by a primary ion beam for etching to derive therefrom information on the specimen such as charged particle beams or electromagnetic waves in an attempt to analyze the surface of the specimen in succession with the progress of the etching, wherein the etching of the specimen is effected by scanning the primary ion beam over an area larger than and inclusive of a region to be analyzed and the information generated from the specimen surface only when the primary ion beam passes through the region to be analyzed which is preset is detected, thereby making free from influences from the side wall of a hole produced on the specimen by the etching to improve the precision of analysis in the depth direction of the specimen.

Differential etching of ion-implanted garnet

Abstract: A new technique for generating precise surface structures in single‐crystal garnet materials is described. The crystals are ion implanted in localized areas using photoresist as an implantation mask. The photoresist is removed and the crystals are etched in phosphoric acid. The damaged volumes produced by the ion implantation etch at a substantially greater rate than the undamaged material, thereby producing surface structures. Groove depth can be precisely defined and reproduced by controlling the implantation parameters: ion species, energy, and dose. Undercutting is minimal and etching conditions are not stringent. The method is superior to both standard chemical etching and ion milling. The process has been characterized for H, He, and Ne implantations. It is shown that the temperature dependence of the etching rates for damaged and undamaged material is the same. The increase in etching rate is proportional to the damage concentration. The etching rate profiles are therefore synonymous with the damage profiles produced by the implantation. Etching rates more than three orders of magnitude greater than that of undamaged material have been observed. The etching rates for the three elements used correlate fairly well with the theoretical nuclear stopping power, and the groove depths obtained correlate with the theoretical ion ranges. This method has been used to produce serrated edge grooves which serve as rails for magnetic bubble propagation in conductor‐groove bubble propagation circuits.

Dielectric optical waveguides and technique for fabricating same

Abstract: A method of fabricating dielectric optical waveguides comprises the steps of: (1) fabricating a single or double heterostructure from the GaAs-AlGaAs system preferably by liquid phase epitaxy or molecular beam epitaxy; (2) forming a native oxide layer on the top surface of the heterostructure by anodization in H2O2; (3) removing a portion of the oxide layer to form a mask and hence to define the waveguide shape in the direction of light propagation; and (4) forming a mesa-like structure with optically flat side walls by etching at a slow rate in Br2-CH3OH. After step (4) two alternative techniques leading to structurally different waveguides may be followed. In one technique, an AlGaAs layer is epitaxially grown over the mesa to form a two dimensional waveguide. In the other technique, the edges of the active region of an AlGaAs double heterostructure are differentially etched in a neutral solution of H2O2. The latter step is particularly useful in the fabrication of active devices because the resulting structure is self-masking, thereby facilitating the formation of electrical contacts.

Die and method for cutting labels and the like

Abstract: A die is provided for cutting at least one but less than all of the layers of a plurality of layers of paper such as a sheet of lables or the like. A raised cutting edge of the die is rounded so that the portions of the cut layer or layers on either side of a cut made by the cutting edge are cammed away from each other so that the backing or other layers are neither cut nor crushed. The die may be made by etching according to conventional procedures followed by moving the usual cutting edge obtained through a spray of etching fluid at such a rate that the cutting edge is naturally rounded.

Process for preparing semiconductor

Abstract: A semiconductor is prepared by continuously etching at least two types of silicon compound membranes such as silicon dioxide (SiO2), silicon nitride (Si3N4) or a polycrystalline silicon membrane which are formed on a silicon substrate. A freon gas plasma is used for etching so that the two types of silicon compound membranes are continuously etched in a sloped form without any undercutting, as occurs in conventional chemical solution etching.

Integrated circuit fabrication process

Abstract: Integrated circuits of high density are fabricated in a simplified process which allows both the use of multiple conducting layers in a dielectric above a semiconductor substrate, such as a polycrystalline silicon (polysilicon) field shield and metal interconnection lines, while also making provision for very precise alignment of subsequent layers to diffusions. A doped oxide containing a suitable dopant, such as arsenic in the case of a p-type silicon substrate, is deposited on the substrate. A pattern corresponding to desired diffusions is generated by normal photolithographic and etching techniques. A second, undoped oxide layer is thermally grown over the semiconductor substrate with dopant from the doped oxide simultaneously diffusing into areas of the substrate underlying the doped oxide. The undoped oxide serves to prevent autodoping. Thermally growing the undoped oxide layer converts a layer of the semiconductor surface not covered by doped oxide to the undoped oxide. Both oxide layers are then removed, leaving slight steps at the surface of the semiconductor substrate around the diffusion. The slight steps serve to allow very precise alignment of masks for subsequent process steps. Otherwise, the structure produced is very planar. An insulating layer, desirably a composite of silicon dioxide and silicon nitride in the case of a silicon substrate, is then formed on the substrate, followed by a layer of polycrystalline semiconductor, desirably doped to provide high conductivity. Openings are then etched in the polycrystalline semiconductor layer to allow formation of gate electrodes of FET''s, contact to the substrate, and contact of a subsequent interconnection metallization to diffusions in some of the circuits. A second insulating layer, such as silicon dioxide, is then grown on the polycrystalline semiconductor layer. Contact holes are then made to diffusions in the substrate, the substrate itself, and the polycrystalline silicon. The deposition and etching of an interconnection layer on the second insulating layer completes fabrication of the integrated circuit.

Silicon pressure sensor

Abstract: A method of fabricating a piezoresistive pressure sensor from a monocrystalline silicon wafer depends upon a boron P+ conductivity layer as an etch stop to an anisotropic etch using potassium hydroxide as the etchant. The etching is selectively done so that the inner portion of the wafer is relatively thin and the outer portion is relatively thick. The process permits the fabrication of piezoresistive pressure sensitive elements of a bridge to be formed of monocrystalline silicon in the relatively thin inner portion and also permits the fabrication of pressure insensitive elements, formed of monocrystalline silicon in the outer portion, electrically connected to the pressure sensitive elements. The resultant structure is a monocrystalline silicon wafer cut along the (110) or the (100) crystallographic plane and having at least the pressure sensitive and pressure insensitive elements of the bridge circuit as integral parts.

Method of etching films of silicon nitride and silicon dioxide

Abstract: An etching liquid comprises ammonium fluoride or alkali fluoride dissolved in a polyvalent or higher alcohol.

Sputtered ferroelectric thin-film electro-optic modulator

Abstract: The modulation of guided optical waves has been accomplished using an integrated ferroelectric thin‐film structure. LiTaO3 was rf sputtered onto 7059 glass in an argon‐oxygen environment. Electrodes for applying the modulation signal were formed by chemically etching an interdigital pattern in gold which was rf sputtered onto the LiTaO3. The observed modulation of guided waves launched in the ferroelectric film can be attributed to the linear electro‐optic effect.

Study of polyethylene spherulites using scanning electron microscopy

Abstract: A detailed scanning electron microscopy study has been made of spherulites in meltcrystallized polyethylene. In particular, unetched, ion etched, nitric acid etched and plastically deformed polyethylene samples have been examined. It appears that the spherulites visible on the surface of these samples consist of lamellae which possess alternate right- and left-handed partial twists. It is quite possible that enough material was removed from the surfaces of the samples by ion etching that the spherulites visible on etched samples could be representative of bulk samples. While questions remain both about the half twist model and about the current full twist model, the half twist model deserves consideration as an alternate model for spherulite structure.

Stencil process for high resolution pattern replication

Abstract: A method and apparatus for the replication of thin film patterns. A stencil is fabricated of a material such as silicon by etching or epitaxially growing on the silicon wafer. The stencil is used as a shadow mask in molecular beam deposition of the thin film pattern. The technique provides high yields in the formation of relatively large scale thin film patterns.

PRODUCTION OF SiO TAPERED FILMS

Abstract: During SiO2 etching, when the oxide surface etch rate is larger than the bulk etch rate and the photoresist adheres tenaciously to the surface, a near vertical wall or cusp will be formed. This will create potential fracture spots in sputtered or evaporated metal which covers the steps. In the fabrication of self-aligned gate IGFETs, where the gate material acts as a mask against either etching or ion implantation, holes in the step metal will allow regions under the nominal gate to be doped during the source-drain doping. The slope of an etched step can be controlled by fabricating a double layer in which the top layer etches faster than the bulk. The specification describes the use of the enhanced etch rate of ion bombarded SiO2 to generate controlled tapers on window openings.

A sample holder for measurement and anodic oxidation of ion implanted silicon

Abstract: A versatile sample holder for Hall effect and sheet resistivity measurements and for anodic oxidation of silicon has been developed. The main feature of the design is the use of a Teflon edge instead of a rubber or Viton seal for defining the area to be stripped. In this way very good sealing is obtained and severe problems in obtaining well defined etching areas are overcome. It is possible to etch areas from 1.25 mm diameter to 2 mm diameter with constant depth scale. Hall and sheet resistivity measurements can be performed without removing the sample from the holder.

Method of etching films made of polyimide based polymers

Abstract: Methods for etching films made of polyimide based polymers, including polyamide-imides, are provided, which include dissolving desired portions of the film in a solution of a basic compound in a non-aqueous solvent.

Process for use in the manufacture of semiconductive devices

Abstract: A PROCESS STEP FOR USE IN THE MANUFATURE OF SEMICONDUCTOR DEVICES. TO ENABLE THE REMOVAL OF ALL THE PHOTORESIST MATERIAL ALONG WITH ITS INORGANIC CONTAMINATION, AFTER DEVELOPMENT AND ETCHING OF PRESELECTED PORTIONS OF AN OXIDE LAYER ON A SEMICONDUCTOR SLICE, THE MATERIAL IS EXPOSED TO A LOW PRESSURE (FEW TORR) RF GENERATED "COLD" PLASMS (200-300* C.), WHERE THE PLASMA IS A HOMOGENEOUS GEASOUS MIXTURE OF OXYGEN AND ORGANO-HALIDES. THE ORGANO-HALIDE PREFERABLY IS A BINARY OR TERNARY MIXTURE WHERE EACH COMPONENT PREFERABLY INCLUDES NO MORE THAN TWO CARBON ATOMS PER MOLECULE AND IS DESIRABLY FULLY HALOGEN-SUBSTITUTED. ONE OF THE SUBSTITUENTS SHOULD INCLUDE PREDOMINANTLY CHLORINE, WHILE THE OTHER SHOULD INCLUDE A PREDOMINANCE OF EITHER FLUORINE OR FLUORINE-BROMINE COMBINATIONS.

Silicon surface studies by means of proton backscattering and proton induced X-Ray emission

Abstract: The contamination of silicon surfaces, treated with different etching solutions is studied by proton backscattering and proton excited characteristic x-ray emission, using primary energies of 100–140 keV. Carbon, oxygen and iodine atoms were observed on the surface. A suitable etching treatment reduced the oxygen coverage to a value of 0.2 monolayer. Furthermore, by using the channelling effect, a correlation between the number of displaced silicon atoms at the surface and the oxygen coverage is demonstrated. Measurements of carbon-K emission cross sections are reported, which enable one to use the characteristic x-ray emission as a quantitative analytical tool.

Method to establish the endpoint during the delineation of oxides on semiconductor surfaces and apparatus therefor

Abstract: A semiconductor device having a dielectric coating on at least one surface is mounted in a special holder which will allow the etching solution to contact only one oxide coated surface of the semiconductor to etch the same according to a predetermined pattern. A first electrical lead is connected either directly or indirectly to the opposite surface of the semiconductor and a second electrical lead is connected to an electrode disposed in the etching solution. Both of these are connected to a meter or detector for sensing any current between the two leads through the semiconductor. A chopped d.c. light source is focused to provide a spot of light at at least one etching point so that upon removal of the dielectric, the pulsating light beam will generate an a.c. signal on the semiconductor which will be detected by the meter to signal the etching endpoint.

Envelope of Mouse Mammary Tumor Virus Studied by Freeze-Etching and Freeze-Fracture Techniques

Abstract: As part of a study of the cell surface changes associated with the production of murine mammary tumor virus, the structure of the envelope of this virus has been examined by using freeze-fracture techniques. Both fracture and deep-etch surfaces were examined. The fracture faces contain 10-nm spheres comparable to those observed on fractured plasma membranes, although fewer in number. Surfaces exposed by etching possess a highly regular hexagonal array of pits 25 nm apart. By examining freeze-fracture and freeze-etch preparations of virus with ferritin covalently bound to its surface, it has been determined that the surface exposed by etching is the outer surface of the virus. The pitted exterior surface of the mammary tumor virus appears to be a unique surface structure.

Method for fabrication of integrated circuit structure with full dielectric isolation utilizing selective oxidation

Abstract: Structure: An integrated circuit structure with full dielectric isolation comprising a supporting substrate having a planar surface of dielectric material and a semiconductor layer on said dielectric surface which forms a planar interface with the surface Regions of oxidized silicon extend through the layer from said interface, surrounding and dielectrically isolating pockets of silicon in the layer; the oxidized silicon regions extend to the upper surface of the semiconductor layer where they are substantially co-planar with the silicon pockets The devices of the integrated circuit are formed in said silicon pockets Method: The structure is fabricated by a novel method wherein a lightly doped silicon layer is deposited on a highly doped silicon substrate; surrounding oxidized silicon regions are then formed by selectively thermally oxidizing portions of the silicon layer to form oxide regions which are co-extensive with the oxidized areas and, thus, are co-planar with the remaining silicon pockets at both surfaces of the layer; a member having a dielectric surface interfacing with the silicon layer is formed, and the silicon substrate is removed by preferential electrochemical anodic etching to leave the silicon layer having the oxidized regions surrounding spaced silicon pockets mounted on said member

Sperrfreie kontakte an indiumphosphid

Abstract: Various etches for InP are investigated and the etching rates established. For contacting of high resistive InP different metals are examined. Low resistive contacts may be reached by In, Sn, Au, Ni and Ge-containing alloys. The contact resistance is found to depend strongly on the temperature cycle, specifically becoming smaller with decreasing alloying time.

Method of etching silicon oxide to produce a tapered edge thereon

Abstract: A method of etching away a selected portion of silicon oxide from a body of silicon oxide and tapering the edge of the remaining silicon oxide that delineates the selected portion comprises the steps of (a) delineating the selected portion with a coating of a photoresist on a surface of the body, and (b) etching away the selected portion with a composite solution that contains both an etchant for the silicon oxide and a component for lifting only the edge of the photoresist from the interface between the photoresist and the silicon oxide at the delineation of the selected portion.