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Showing papers on "Fault detection and isolation published in 1970"


Journal ArticleDOI
TL;DR: In this paper, a methodical procedure for organization of fault detection experiments for synchronous sequential machines possessing distinguishing sequences (DS) is given, based on the transition checking approach, which is considered in three concatenative parts: 1) the initial sequence which brings the machine under test into a specific state, 2) the α-sequence to recognize all the states and to establish the information about the next states under the input DS, and 3) the β -sequence to check all the individual transitions in the state table.
Abstract: A methodical procedure for organization of fault detection experiments for synchronous sequential machines possessing distinguishing sequences (DS) is given. The organization is based on the transition checking approach. The checking experiment is considered in three concatenative parts: 1) the initial sequence which brings the machine under test into a specific state, 2) the α-sequence to recognize all the states and to establish the information about the next states under the input DS, and 3) the β-sequence to check all the individual transitions in the state table.

248 citations


Journal ArticleDOI
TL;DR: In this paper, it is shown that the terminal that looks inductive to a wavefront coming from the dc line is undesirable because it would cause high overvoltages at the terminal of the unfaulted pole.
Abstract: Digital programs are used to investigate the overvoltages induced in one pole of a bipolar HVDC overhead line, and caused by a line-ground fault on the other dc pole. Various digital tests are carried out, bearing in mind in particular the nature of dc line termination at the converter stations, which may include filter circuits and a surge capacitor. It is shown that the terminal that looks inductive to a wavefront coming from the dc line is undesirable because it would cause high overvoltages at the terminal of the unfaulted pole. It is also shown that in order to reduce the risk of developing a double-pole outage from a single-pole fault, it is desirable to do away with the surge capacitor, if a suitable dc lightning arrester can be designed. Tests are presented in stages to isolate the effects of fault resistance, grid control, and line resistance. Results also indicate the restraints to be put upon the dv/dt line fault detection in order to avoid operation of this protection in the unfaulted pole.

63 citations


Journal ArticleDOI
TL;DR: By a checking sequence for a sequential machine, the authors mean an input-output sequence with a special property such that, when the input sequence is applied to the machine, the decision whether or not the machine operates correctly can be made by comparing the output sequence with the output of the machine.
Abstract: By a checking sequence for a sequential machine, we mean an input-output sequence with a special property such that, when the input sequence is applied to the machine, the decision whether or not the machine operates correctly can be made by comparing the output sequence with the output of the machine.

20 citations


Journal ArticleDOI
01 Apr 1970
TL;DR: A fault-detection scheme intended to be capable of providing the necessary information for a direct digital control of a.c.-d.c. convertors is described and it is shown that these requirements can only be achieved by sequential logic.
Abstract: A fault-detection scheme intended to be capable of providing the necessary information for a direct digital control of a.c.-d.c. convertors is described. The proposed scheme provides fast, safe, unique and unambiguous discrimination between the fault condition and its origin through the initial stages of the fault. It is shown that these requirements can only be achieved by sequential logic. Backup detection, based on a completely different principle, is also provided for the automatic location of possible circuit faults within the main detection scheme.

13 citations


Journal ArticleDOI
TL;DR: The Stored Program Control No. 1A processor complex was designed to be a highly reliable complex using a conservative discrete component hardware design with excellent fault detecting capability and with exceptionally good automatic recovery of call processing when faced with hardware faults.
Abstract: The Stored Program Control No. 1A processor complex was conceived as a program sequenced control for the Traffic Service Position System No. 1 and for the Electronic Translator Systems. It was designed to be a highly reliable complex using a conservative discrete component hardware design with excellent fault detecting capability and with exceptionally good automatic recovery of call processing when faced with hardware faults. The design aims, order structure, hardware features, fault detection, diagnostic, and recovery aspects of the system are described. Stress is placed on those features which are felt to be improvements over previous program controlled systems.

10 citations


Journal ArticleDOI
TL;DR: A unified parity check scheme for both control and data transfer circuits is presented and it is shown that the choice of fault detection methods for both circuits is strongly dependent on system organization.
Abstract: The choice of fault detection methods to be used in control and data transfer circuits is strongly dependent on system organization. This paper presents a unified parity check scheme for both.

8 citations


Patent
30 Dec 1970
TL;DR: An alarm or fault detection system for in-service electronic equipment which is not electrically connected to the equipment is described in this paper, where a chemical tracer element which is responsive to the application of a certain force, physical stress, electrical stress, or heat is embedded in the equipment or portion thereof that is to be monitored.
Abstract: An alarm or fault detection system for in service electronic equipment which is not electrically connected to the equipment. A chemical tracer element which is responsive to the application of a certain force, physical stress, electrical stress, or heat, for example, is embedded in the equipment or portion thereof that is to be monitored. When the equipment's functional tolerance limit of the certain force is reached, the tracer element is released in a gaseous form. Presence of the tracer element's vapors in the equipment enclosure is detected by a transducer which responds to a particular vapor representing a particular component or equipment malfunction and indicates it to an observer.

8 citations




Proceedings ArticleDOI
28 Oct 1970
TL;DR: Using the ADSE table, a procedure is presented that allows existing methods for constructing synchronous checking experiments to be used directly to obtain the desired asynchronous checking experiment.
Abstract: A new flow table for describing normal-fundamental-mode (NFM) asynchronous machines, the ADSE table, is introduced. Although the structure of this table has several ramifications in the area of circuit realization, this paper emphasizes its utility in generating checking experiments for NFM asynchronous machines. Using the ADSE table, a procedure is presented that allows existing (or future) methods for constructing synchronous checking experiments to be used directly to obtain the desired asynchronous checking experiment.

6 citations


Journal Article
TL;DR: The proposed system has model-based approach for fault diagnosis of IC engine using audio signals from engine and Receiver operating characteristic (ROC) analysis provides the most comprehensive description of diagnostic accuracy which is used to diagnose the faults in IC Engine.
Abstract: Advanced methods of supervision fault detection and fault diagnosis become increasingly important for many technical processes, for the improvement of reliability, safety and efficiency. This especially important for safety related processes in aircraft, trains, automobiles, power plants and chemical plants. The classical approaches are limited for checking of some measurable output variables and does not provide a deeper insight and usually do not allow a fault diagnosis. The proposed system has model-based approach for fault diagnosis of IC engine using audio signals from engine. The audio signals are captured from the engine using microphone and are processed using MATLAB to find characteristics parameters of the signals. Artificial Neural Network is used to identify the fault in IC engine, the Receiver operating characteristic (ROC) analysis is used to obtain the most appropriate transfer function for the ANN and it also provides the most comprehensive description of diagnostic accuracy which is used to diagnose the faults in IC Engine.

Proceedings ArticleDOI
Frank M. Goetz1
22 Jun 1970
TL;DR: An improved version of the sequential analyzer was integrated into a data management system with a number of support programs and used to evaluate the diagnostic program for a 32K core memory system under development for electronic switching system (ESS) applications.
Abstract: With the advent of integrated circuitry, digital simulation has replaced physical fault insertion as the primary means for evaluating diagnostic tests. At Bell Laboratories, an improved version of the sequential analyzer was integrated into a data management system with a number of support programs. The system was used to evaluate the diagnostic program for a 32K core memory system under development for electronic switching system (ESS) applications. Important circuit design feedback was obtained through simulation early in the development cycle, making possible an unprecedented high level of switching system fault detection. Processing techniques were developed to select and order tests to obtain high diagnostic resolution with minimum vulnerability to inconsistencies.

01 May 1970
TL;DR: In this article, a computerized onboard expeditious monitor and maintenance analyst (EMMA) is used for automatic spacecraft system fault isolation and repair, in order to diagnose and repair failures.
Abstract: Computerized onboard expeditious monitor and maintenance analyst /EMMA/ for automatic spacecraft system fault isolation and repair

01 Jan 1970
TL;DR: A method to define a systematic procedure for constructing a checking sequence forasequential machine so that one can findachecking sequence for themachine.
Abstract: Bya checking sequenceforasequential machine, we mean an input-output sequencewitha special propertysuchthat, when theinputsequenceisapplied to themachine, thedecision whetherornotthemachineoperatescorrectly canbemadebycom- paringtheoutputsequencewiththeoutputofthemachine. Thispaperdescribes a methodtomodifya givensequential ma- chineinsuchaway thatonecaneasily findachecking sequencefor themachine. Forthemodified machine, asimple systematic procedure forconstructing achecking sequenceandprocedures forfaultdiag- nosisarepresented. IndexTerms-Checkingsequence, fault detection, fault diagnosis, sequential machinewithfault-detection capabilities.

01 Jan 1970
TL;DR: In this article, an algorithm for deriving an optimum test sequence for detecting faults in a synchronous machine is presented, where the flow table is used as a tool to generate the fault detection tests.
Abstract: This paper presents an algorithm for deriving an optimum test sequence for detecting faults in a synchronous machine. In this study, the flow table is used as a tool to generate the fault detection tests. The fault stuck-at-1 (or stuck-at-0) is said to be present when a permanent signal valued l (or 0) appears on a component of the machine. Only single faults are treated. The result of the procedure is one or more test sequences guaranteed to detect a set of faults (F ) • p First, sequential machines with feedback lines as memory elements are considered. Then the memory elements are changed to R-S flip-flops. Finally, several suggestions for further work are made. ii