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Showing papers on "Mixed-signal integrated circuit published in 1986"


Book
01 Jan 1986
TL;DR: In this article, the authors present an overview of the non-ideal effects in Switched-Capacitor Circuits, as well as their application in switch-capacitor circuits.
Abstract: Transformation Methods. MOS Devices as Circuit Elements. MOS Operational Amplifiers. Switched-Capacitor Filters. Nonfiltering Applications of Switched-Capacitor Circuits. Nonideal Effects in Switched-Capacitor Circuits. Systems Considerations and Applications. Index.

923 citations


Journal ArticleDOI
TL;DR: By periodically modifying the reference voltage to compensate for the nonideal signal-transfer-loop gain, it is possible in principle to build A/D and D/A converters whose linearity is independent of component ratios and that occupy only a small die area.
Abstract: A method of cyclic analog-to-digital (A/D) and digital-to-analog (D/A) conversion using switched-capacitor techniques is described. By periodically modifying the reference voltage to compensate for the nonideal signal-transfer-loop gain, it is possible in principle to build A/D and D/A converters whose linearity is independent of component ratios and that occupy only a small die area. These converters require two moderate-gain MOS operational amplifiers, one comparator, and a few capacitors. A test chip for A/D conversion was built and evaluated. The test data show that the A/D performs as a monotonic 13-bit converter with maximum 1-LSB differential and 2-LSB integral nonlinearity.

117 citations


Patent
10 Feb 1986
TL;DR: In this article, the analog signals are applied to a calibration circuit, which adapts the output range of the analog circuits to that of the logic circuits, to obtain with an 8-bit Analog-to-Digital Converter (50) associated with a Multiplexer (29).
Abstract: Microprocessor-based solid-state trip unit (48) processing digital signals derived from analog signals supplied by current sensors (16). The analog signals are applied to a calibration circuit (34), which adapts the output range of the analog circuits to that of the logic circuits, to obtain with an 8-bit Analog-to-Digital Converter (50) associated with a Multiplexer (29) a range equivalent to that of 12-bit processing systems.

88 citations


Patent
Takeshi Yamakawa1
22 Jan 1986
TL;DR: In this paper, the basic circuits of multivalued logic circuits, analog circuits, and the like are defined and discussed, including a successor, quantizer, adder, substracter, divider, multiplier, decoder, literal circuit, equivalence circuit, bilateral T-gate, complement literal circuit and h operator circuit.
Abstract: Disclosed are basic circuits operable in a current mode in multivalued logic circuit systems, analog circuit systems and the like Examples of the basic circuits are a successor, quantizer, adder, substracter, divider, multiplier, decoder, literal circuit, equivalence circuit, bilateral T-gate, complement literal circuit and h operator circuit These basic circuits are realized by using floating threshold switching circuits, floating window switching circuits, threshold SPDT switching circuits, and the like

39 citations


01 Jan 1986
TL;DR: In this lab, the students are introduced to Cadence integrated circuit design environment, the tool set that will be extensively used in the labs of CMOS Analog Integrated Circuit Design.
Abstract: In this lab, the students are introduced to Cadence integrated circuit design environment, the tool set that will be extensively used in the labs of CMOS Analog Integrated Circuit Design. Main contents of this lab include, 1. How to log in and log out SUN workstations and some basic UNIX commands. The TA will verify and evaluate your schematic and simulation results. Evaluation sign-up sheets will be available 3-4 days before the due date. 1. To learn how to use Cadence program. 2. To draw a simple inverter schematic with Virtuoso Schematic Composer. 3. To simulate the inverter schematic in Analog Environment. 4. Plot and view simulation waveforms in Waveform window. 1. Log in: The Unix terminals in the Learning Resources Center, ENS 507, are used for the labs. You should have a login account to the system if you are a registered student. Check with the proctors in ENS 507 if you have any problems to log in. Please choose " Common Desktop Environment (CDE) " when you log in Sun machine. Otherwise, the figures shown in this lab manual may look different. Click " Options " on the login window and go to " Sessions " and choose " Common Desktop Environment (CDE) ". 2. Basic UNIX commands: If you need to learn basic UNIX commands, tutorial in the following URL will be more than enough-commands are summarized in the table below. Basic UNIX Commands Commands Explanation man command_name print manual for command_name on screen. Type space to see the following pages if one screen can not hold all the information. Type 'b' to go back to the previous screen. Type 'q' to quit viewing the manual if there are more than one screens. For example, you can try " man pwd " for information of command " pwd ". pwd print working directory, print current working directory that you are in. 3 cd directory_name change directory to directory_name. If only " cd " is typed without directory_name, change to your home directory. mkdir directory_name make a new directory named directory_name rmdir directory_name remove directory named directory_name ls list files in one directory. " ls-l " list file information in a long format. mv file_name new_file_name move file_name to new_file_name. It can also be used to move a file to a different directory using " mv file_name directory_name ". cp file_name new_file_name copy file_name to new_file_name. It can …

38 citations


Proceedings ArticleDOI
Tsutomu Sasao1
02 Jul 1986
TL;DR: MACDAS as mentioned in this paper is a multi-level AND-OR circuit design automation system, where the input variables are paired to produce an ANDOR two-level circuit with two-variable function generators.
Abstract: MACDAS (Multi-level AND-OR Circuit Design Automation System) designs a multi-level circuit with fan-in limited AND-OR gates. In MACDAS, a given specification is converted into an AND-OR two-level circuit; input variables are paired to produce an AND-OR two-level circuit with two-variable function generators; some of the outputs are complemented to obtain a circuit with fewer AND gates; the circuit is transformed into a multi-level fan-in limited AND-OR circuit; and finally the circuit is optimized by local transformations. MACDAS has been programmed in FORTRAN and C, and runs on a personal computer. Both arithmetic and control circuits are designed to show the performance of MACDAS.

33 citations


Journal ArticleDOI
TL;DR: Performance, cost, features, and time to market are the factors that separate winners from losers in the ASIC marketplace and these same pressures affect vendors of IC CAD systems, too.

31 citations



Book
01 Jun 1986

27 citations


Journal ArticleDOI

26 citations


Patent
27 May 1986
TL;DR: In this paper, an integrated circuit power timer with a power field effect transistor and a versatile timing circuit all on one integrated circuit is provided, and the integrated circuit has built in thermal and current limit protection and provides a fault indicator in case of an over current or an over temperature condition.
Abstract: An integrated circuit power timer having a power field effect transistor and a versatile timing circuit all on one integrated circuit is provided. The integrated circuit has built in thermal and current limit protection and provides a fault indicator in case of an over current or an over temperature condition.

Patent
01 Jul 1986
TL;DR: A test circuit for a VLSI integrated circuit includes interface test circuits (20) which are disposed between a logic circuit (16) an output terminal (14) as mentioned in this paper.
Abstract: A test circuit for a VLSI integrated circuit includes interface test circuits (20) which are disposed between a logic circuit (16) an output terminal (14). The interface circuits (20) are each operable to provide a transparent interface between logic circuit (16) and output terminals (14) or force a high logic state on the output, a low logic state on the output or a floating state. A test code circuit (22) is operable to receive two logic signals from pins (24) and (26) external to the IC and determine the state of the test interface circuit (20) such that all test interface circuits (20) operate simultaneously in the same mode.

Journal ArticleDOI
TL;DR: An effort on the part of digital workstation companies to add capabilities for analog engineers similar to those available in digital design workstations is made.
Abstract: Wh hile a few computer-based tools have been available to support the design of analog circuits, until recently there has been no comprehensive set of tools for analog engineers similar to those available in digital design workstations. The attention of computer-aided engineering companies has been given almost entirely to digital design-so much attention, in fact, that a workstation market spawned in the digital logic area has quickly become a major computer segment. There has been an effort on the part of digital workstation companies to add capabilities for analog engineers. Analog design, however, differs significantly from digital in both technology and methodol-

Proceedings ArticleDOI
07 Jul 1986
TL;DR: Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations similar to those provided for digital designs and supported by computer-aided design (CAD) tools
Abstract: Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

Patent
Baba Shirou1
13 May 1986
TL;DR: In this paper, a digital semiconductor integrated circuit with a common external terminal connected commonly with the input terminals of a digital signal input circuit and an analog signal input terminal is presented.
Abstract: Herein disclosed is a digital semiconductor integrated circuit which is equipped with: a digital signal input circuit; an analog signal input circuit made receptive of an analog signal for feeing out a digital signal corresponding to said analog signal; and a common external terminal connected commonly with the input terminals of said digital signal input circuit and said analog signal input circuit. By the preparation with the use of a suitable switch circuit, the aforementioned common external terminal can be used as either an analog signal input terminal or a digital signal input terminal. As a result, the number of the external output terminals required for the aforementioned semiconductor integrated circuit can be reduced.

Book
01 Jan 1986
TL;DR: In this paper, the authors present an analysis of resistive circuit elements and laws for resistive circuits and their application in control and instrumentation of electrical systems. But they do not discuss the use of digital logic circuits.
Abstract: 1 IntroductionPart I*Linear Electric Circuits2 Circuit Elements and Laws3 Analysis Techniques for Resistive Circuits4 The Energy Storage Elements5 AC Circuits6 TransientsPart II*Electronic Circuits7 Diodes8 Transistors and Amplifiers9 The Operational Amplifier10 Digital Electronic CircuitsPart III*Electric Power and Machines11 Polyphase Circuits12 Magnetic Circuits13 Transformers14 DC Machines15 Synchronous Machines16 Induction Motors17 Small AC Motors18 Electric Power SystemsPart IV*Control and Instrumentation19 Feedback Control Systems20 Electrical InstrumentationPart V*Digital Circuits and Systems21 Digital Logic Circuits22 Digital SystemsAppendixesA Unit ConversionB Fourier SeriesC LaPlace TransformsAnswers to ProblemsIndex

Proceedings ArticleDOI
01 Jan 1986
TL;DR: A POWER IC embodying a vertical power MOSFET and high- voltage and low-voltage CMOS stages will be reported, which operates in an emitter-follower configuration.
Abstract: A POWER IC embodying a vertical power MOSFET and high-voltage and low-voltage CMOS stages will be reported. Figure 1 shows the block diagram of the power IC. Its output stage is a vertical N-channel MOSFET. In the interest of safety and corrosion resistance essential in automative electronics the chip must be designed as a high-side switch; i.e., the loads, involving lamps, motors, solenoid valves, etc., are grounded. Thug the chip operates in an emitter-follower configuration. To ensure full turnon of the MOSFET, the source voltage level should approach the battery voltage as closely as possible; the voltage across the gate must exceed the battery voltage by at least 7V.


Patent
07 Nov 1986
TL;DR: An interface unit between analog signals from a device being monitored and a digital signal data bus includes a multiplexer unit, a sample and hold amplifier, an analog to digital converter, a buffer memory unit, and control circuits as discussed by the authors.
Abstract: An interface unit between analog signals from a device being monitored and a digital signal data bus includes a multiplexer unit, a sample and hold amplifier, an analog to digital converter, a buffer memory unit, and control circuits. The control circuits are responsive to signals from a central processing unit and can control the operating parameters of the interface unit, including a software programmable clock. The control circuits can also generate interrupt signals.

Patent
30 Jan 1986
TL;DR: In this paper, the analog output network includes at least two controllers (18, 20), each of which is connected to an analog output circuit (38, 40) and a controller-selector (36), connected to each of the controllers and the analog outputs.
Abstract: An analog output network provides redundant multiple communication paths for control of an actuator in response to an input signal. The analog output network includes at least two controllers (18, 20), each of which is connected to an analog output circuit (38, 40) and a controller-selector (36) which is connected to each of the controllers and the analog output circuits. The controller-selector ensures that at least one of the analog output circuits is enabled at all times and identifies one of the controllers as an on-line controller. The analog output circuit connected to the on-line controller generates an actuation signal which passes through the actuator and the other analog output circuit. An alternate current path comprising a diode string (72) with a voltage drop larger than the voltage drop of the actuation signal in the other analog output circuit is provided so that, in the event an analog output circuit is removed or is defective, the actuation signal from the on-line analog output circuit is still provided with a current path to control the actuator.

Patent
04 Aug 1986
TL;DR: In this paper, a control circuit provides control signals for controlling the operation of the sample-and-hold circuits, the multiplexer, and the analog-to-digital converter.
Abstract: A unit for providing an interface between analog input signals and a digital data processing system bus includes a plurality of sample-and-hold circuits coupled to the analog input signals, a multiplexer for selecting a particular sample-and-hold circuit, and an analog-to-digital converter for providing a digital signal related to the amplitude of a selected portion of the input signal. A control circuit provides control signals for controlling the operation of the sample-and-hold circuits, the multiplexer, and the analog-to-digital converter circuit. The control circuit can receive and store signals from the data processing system and use such signals to control the operation of the interface unit.

Patent
29 Aug 1986
TL;DR: In this paper, the reference voltages for the converter are provided by digital to analog converters, under the control of a central processing unit to establish a range of interest in the analog data.
Abstract: Analog data is collected by conversion to a digital representation thereof via an analog to digital converter. Reference voltages for the converter are provided by digital to analog converters. The reference voltages are varied under the control of a central processing unit to establish a range of interest in the analog data. The range of interest is narrower than the conversion range of the analog to digital converter.

Proceedings ArticleDOI
I. Wacyk1, M. Amato, V. Rumennick
01 Jan 1986
TL;DR: A junction-isolated IC featuring 500V/1A DMOS transistors, controlled by 10V standard-cell CMOS analog circuits, which are on the same die, will be described.
Abstract: A junction-isolated IC featuring 500V/1A DMOS transistors, controlled by 10V standard-cell CMOS analog circuits, which are on the same die, will be described. The IC functions as a 1MHz power conversion controller.


Proceedings ArticleDOI
01 Apr 1986
TL;DR: The sound production mechanism of the piano is represented with an equivalent electric circuit model, which is constructed by a combination of digital filters, which may be applied to making a new type of the digital sound synthesizer.
Abstract: The sound production mechanism of the piano is represented with an equivalent electric circuit model, which is constructed by a combination of digital filters. Piano tone synthesis using these digital filters is experimented by computer simulation. The method may be applied to making a new type of the digital sound synthesizer.

Journal ArticleDOI
TL;DR: Simulation of the circuit will demonstrate how it is an extremely useful design tool and the results of simulation and measured values are compared with a standard operational CMOS amplifier.
Abstract: Standard digital CMOS gate arrays, originally developed for digital circuits only, also allow the implementation of analog functions on the chip. Knowing the problems and limitations, the designer can achieve a very compact solution. At first, the basic analog elements, like current mirror and difference amplifier, will be introduced. With these elements, more complex circuits can be built. Possible problems are discussed. Simulation of the circuit will demonstrate how it is an extremely useful design tool. The results of simulation and measured values are compared with a standard operational CMOS amplifier. Several industrial applications demonstrate that analog and digital functions can be combined.

Proceedings ArticleDOI
J. Steininger1, E. Swanson
01 Jan 1986
TL;DR: In this paper, an optical data link circuit designed in a 1.5μm CMOS technology is described. But the chip requires a single 5V power supply and internally generates a bias voltage for the PIN diode.
Abstract: This report will cover an optical data link circuit designed in a 1.5μm CMOS technology. Operation is from 1Mb/s to 50Mb/s with a 60dB dynamic range: input currents are as low as 100nA rms. The chip requires a single 5V power supply and internally generates a bias voltage for the PIN diode.

Patent
Gray Larry O1
28 Aug 1986
TL;DR: In this paper, an improved electronic system for automatically maintaining the actual speed of a vehicle at or near a desired speed is disclosed, which includes means for generating electrical signals representing both the actual and desired speeds of the vehicle.
Abstract: An improved electronic system for automatically maintaining the actual speed of a vehicle at or near a desired speed is disclosed. The system includes means for generating electrical signals representing both the actual and desired speeds of the vehicle. The desired speed signal generating means includes a digital memory circuit and an analog memory circuit. The digital memory circuit and the analog memory circuit are provided to generate and store electrical signals which are representative of the desired speed of the vehicle during different phases of operation of the system. The digital memory circuit is utilized to supply the desired speed signal to the comparison circuit during normal operation of the system. The analog memory circuit is utilized to supply the desired speed signal to the comparison circuit when the resume or accerleration features of the system are activated. The outputs of the digital memory circuit and the analog memory circuit are both connected to a memory buffer circuit. The memory buffer circuit feeds only the lesser one of the desired speed signals stored in the digital and analog memory circuits to a comparison circuit, where it is compared with the actual speed signal. Improved circuits for accomplishing resume and acceleration features are also disclosed.

Proceedings ArticleDOI
01 Apr 1986
TL;DR: Fault contrast as discussed by the authors is a differential analog technique that yields high-quality voltage contrast images of integrated circuit (IC) pass vs. fail operation, where the IC failure mode is sensitive to an external parameter, e.g. clock frequency or supply voltage.
Abstract: Fault contrast is a differential analog technique that yields high-quality voltage contrast images of integrated circuit (IC) pass vs. fail operation. Fault contrast is applicable where the IC failure mode is sensitive to an external parameter, e.g. clock frequency or supply voltage. Fault contrast requires only simple and inexpensive analog signal processing. We demonstrate fault contrast with an analysis of an Intel 80286 microprocessor failure.