Showing papers on "Reference architecture published in 2000"

Principled design of the modern Web architecture

Abstract: The World Wide Web has succeeded in large part because its software architecture has been designed to meet the needs of an Internet-scale distributed hypermedia system. The modern Web architecture emphasizes scalability of component interactions, generality of interfaces, independent deployment of components, and intermediary components to reduce interaction latency, enforce security, and encapsulate legacy systems. In this paper, we introduce the Representational State Transfer (REST) architectural style, developed as an abstract model of the Web architecture to guide our redesign and definition of the Hypertext Transfer Protocol and Uniform Resource Identifiers. We describe the software engineering principles guiding REST and the interaction constraints chosen to retain those principles, contrasting them to the constraints of other architectural styles. We then compare the abstract model to the currently deployed Web architecture in order to elicit mismatches between the existing protocols and the applications they are intended to support.

Architectures for netcentric computing systems

Abstract: An execution architecture, a development architecture and an operations architecture for a netcentric computing system. The execution architecture contains common, run-time services required when an application executes in the netcentric computing system. The development architecture is the production environment for one or several systems development projects as well as for maintenance efforts. The purpose of the development environment is to support the tasks involved in the analysis, design, construction, and maintenance of business systems, as well as the associated management processes. It is important to note that the environment should adequately support all the development tasks, not just the code/compile/test/debug cycle. The operations architecture is a combination of tools and support services required to keep a production system up and running efficiently.

ATAM: Method for Architecture Evaluation

Abstract: : If a software architecture is a key business asset for an organization, then architectural analysis must also be a key practice for that organization. Why? Because architectures are complex and involve many design tradeoffs. Without undertaking a formal analysis process, the organization cannot ensure that the architectural decisions made-particularly those which affect the achievement of quality attribute such as performance, availability, security, and modifiability-are advisable ones that appropriately mitigate risks. In this report, some of the technical and organizational foundations for performing architectural analysis are discussed, the Architecture Tradeoff Analysis Method (ATAM), is presented. The ATAM is a technique for analyzing software architectures that has been developed and refined in practice over the past three years.

Software architecture: a roadmap

Abstract: Over the past decade software architecture has received increasing attention as an important subfield of software engineering. During that time there has been considerable progress in developing the technological and methodological base for treating architectural design as an engineering discipline. However, much remains to be done to achieve that goal. Moreover, the changing face of technology raises a number of new challenges for software architecture. This paper examines some of the important trends of software architecture in research and practice, and speculates on the important emerging trends, challenges, and aspirations.

Representing and encoding plant architecture: A review

Abstract: A plant is made up of components of various types and shapes. The geometrical and topological organisation of these components defines the plant architecture. Before the early 1970's, botanical drawings were the only means to represent plant architecture. In the past two decades, high-performance computers have become available for plant growth analysis and simulation, triggering the development of various formal representations and notations of plant architecture (strings of characters, axial trees, tree graphs, multiscale graphs, linked lists of records, object-oriented representations, matrices, fractals, sets of digitised points, etc.). In this paper, we review the main representations of plant architecture and make explicit their common structure and discrepancies. The apparent heterogeneity of these representations makes it difficult to collect plant architecture information in a generic format to allow multiple uses. However, the collection of plant architecture data is an increasingly important issue, which is also particularly time-consuming. At the end of this review, we suggest that a task of primary importance for the plant-modelling community is to define common data formats and tools in order to create standard plant architecture database systems that may be shared by research teams.

Software Radio Architecture: Object-Oriented Approaches to Wireless Systems Engineering

Abstract: ABOUT THE AUTHOR JOSEPH MITOLA III, PhD, introduced the software radio architecture in 1992. He was the founding chair of the software-defined Radio (SDR) Forum in 1996. He teaches industrial courses on the subject in the United States and Europe for clients such as the U.S. Department of Defense. He is also widely published and cited, having served as editor-in-chief for the landmark May 1995 issue of IEEE (NY) Communications Magazine, the April 1999 Journal on Selection Areas in Communication on Software Radios, and the ongoing series Software and DSP in Radio.

Software Architecture for Product Families: Principles and Practice

Abstract: Software development organizations are now discovering the efficiencies that can be achieved by architecting entire software product families together. In Software Architecture for Product Families, experts from one of the worlds most advanced software domain engineering projects share in-depth insights about the techniques that work -and those that dont. The book offers a solutions-oriented, case-study approach covering the entire development lifecycle, based on advanced work done by three of Europes leading technology companies and their academic partners. Discover the challenges that drive companies to consider architecting product families, and the new problems they encounter in doing so. Master concepts and terms that can be used to describe the architecture of a product family; then learn how to assess that architecture, and transform it into working applications. The authors also present chapter-length, realworld case studies of domain engineering projects at Nokia, Philips, and ABB.

Intelligent Systems: Architecture, Design, and Control

Abstract: From the Publisher: A cutting-edge, multidisciplinary framework for intelligent systems While intelligence is a difficult concept to comprehend, research into its mechanisms and functions is rapidly exploding in both biological and artificial systems. This book introduces an original model of intelligent systems, integrating knowledge from diverse sources and developing a general theory that can be used for the analysis of all kinds of highly complex systems, from whole economies to integrated manufacturing. Intelligence as a computational phenomenon dwells upon grouping, focusing attention, and combinatorial search as its fundamental operators. In this groundbreaking work, Alex Meystel and James Albus, two of the foremost authorities in the field, draw on two decades of testing the theory in robots and other smart machines. (Dr. Meystel developed an autonomous Dune-Buggy in 1983—1987; Dr. Albus’s work forms the basis for the control system used in the Army Demo III Experimental Unmanned Ground Vehicle program, 1997—present.) Special coverage of the NIST-RCS (Real-time Control System) model is also featured in this liberally illustrated and clearly written book. Focusing on intelligence as a computational phenomenon with a multiresolutional architecture, Intelligent Systems: Architecture, Design, and Control promises to dramatically influence future research and development in intelligence worldwide. It is a one-of-a-kind resource for scientists, engineers, and anyone wishing to explore the contemporary theory and tools of computational intelligence.

Capturing Software Architecture Design Expertise with Armani

Abstract: Armani is a language for capturing software architecture design expertise and specifying software architecture designs. This document describes the Armani language in detail with specifications for the language syntax and semantics, as well as examples illustrating common usage. Revision notes: Additional planned changes to this revision include: (a) elaboration of Appendix 1 so it is readable without reference to [OS97]; clearer exposition of Chs. 2-4 so terms are defined clearly before being used; (c) correction of miscellaneous typos, inconsistencies, and errors. The research reported here was sponsored by the Wright Laboratory, Aeronautical Systems Center, Air Force Materiel Command, USAF, and the Advanced Research Projects Agency (ARPA) under grants F33615-93-1-1330 and N66001-95-C-8623; and by National Science Foundation under Grant CCR-9357792 and a Graduate Research Fellowship. Support was also provided by the Kodak Corporation in the form of a Graduate Research Fellowship. Views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of Wright Laboratory, the US Department of Defense, the United States Government, or the National Science Foundation. The US Government is authorized to reproduce and distribute reprints for Government purposes, notwithstanding any copyright notation thereon. Capturing Software Architecture Design Expertise with Armani Version 2.3 Robert T. Monroe Originally published October, 1998 Last Revised September, 2000 CMU-CS-98-163

aSOC: A Scalable, Single-Chip Communications Architecture

Abstract: As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with on-chip system-level issues such as adaptability and scalability. Recent trends indicate that next generation systems will require new architectures and compilation tools that effectively deal with these constraints. In this paper, a new single-chip interconnect architecture, adaptive System-On-a-Chip, is described that not only provides scalable data transfer, but also can be easily reconfigured as application-level communication patterns change. An important aspect of the architecture is its support for compile-time, scheduled communication. To illustrate the benefits of the architecture, three DSP benchmarks have been mapped to candidate SoC devices of assorted sizes, which contain the new, interconnect architecture. The described interconnect architecture is shown to be up to 5 times more efficient than bus-based SoC interconnect architectures via parallel simulation. Additionally, a preliminary layout of our architecture is shown and derived area and performance parameters are presented.

C4ISR Architectures: I. Developing a Process for C4ISR Architecture Design

Abstract: The C4ISR Architecture Framework document issued by the Department of Defense specifies three views of an information architecture and defines a set of products that describe each view. These architecture views are to serve as the basis for C4ISR system development and acquisition. The Framework does not provide a process for architecture design. In this paper, information architectures are described in the context of Structured Analysis, and then the architecture views of the Framework and the related products are interpreted in that context. A methodology for architecture design is developed that is then implemented using Structured Analysis and object orientation in two companion papers. © 2000 John Wiley & Sons, Inc. Syst Eng 3: 225‐247, 2000

The Architecture Based Design Method

Abstract: : This paper presents the Architecture Based Design (ABD) method for designing the high-level software architecture for a product line or long-lived system. Designing an architecture for a product line or long-lived system is difficult because detailed requirements are not known in advance. The ABD method fulfills functional, quality, and business requirements at al level of abstraction that allows for the necessary variation when producing specific products. Its application relies on an understanding of the architectural mechanisms used to achieve this fulfillment. The method provides a series of steps for designing the conceptual software architecture. The conceptual software architecture provides organization of function, identification of synchronization points for independent threads of control, and allocation of function to processors. The method ends when commitments to classes, processes and operating system threads begin to be made. In addition, one output of the method is a collection of software templates that constrain the implementation of components of different types. The software templates include a description of how components interact with shared services and also include "citizenship" responsibilities for components.

Region-based caching: an energy-delay efficient memory architecture for embedded processors

Abstract: Power consumption has been a major concern in designing microprocessors for portable systems such as notebook computers, hand-held computing and personal telecommunication devices. As these devices increase in popularity and are used in a wider range of applications, a low power design becomes more critical. In this paper, we propose a new microarchitectural data cache design called region-based caching that can reduce power consumption. Power savings is achieved by re-organizing the the rst level cache to more eÆciently exploit memory reference characteristics produced by programming language semantics. These characteristics enable the cache to be partitioned by memory region (stack, global, heap), reducing power consumption, while retaining comparable performance to a conventional cache design. Applications from the MediaBench benchmark suite indicate that a design with two additional small region-based caches results in 66% reduction in average in energy-delay product.

The IMS MISSION architecture for distributed manufacturing simulation

Abstract: This paper presents an overview of a neutral reference architecture for integrating distributed manufacturing simulation systems with each other, with other manufacturing software applications, and with manufacturing data repositories. Other manufacturing software applications include, but are not limited to systems used to: design products; specify processes; engineer manufacturing systems; and manage production. The architecture identifies the software building blocks and interfaces that will facilitate the integration of distributed simulation systems and enable the integration of those systems with other manufacturing software applications. The architecture is being developed as part of the international Intelligent Manufacturing Systems (IMS) MISSION project.

Secrets from the Monster: Extracting Mozilla’s Software Architecture

Abstract: As large systems evolve, their architectural integrity tends to decay. Reverse engineering tools, such as PBS [7, 19], Rigi [15], and Acacia [5], can be used to acquire an understanding of a system’s “as-built” architecture and in so doing regain control over the system. A problem that has impeded the widespread adoption of reverse engineering tools is the tight coupling of their subtools, including source code “fact” extractors, visualization engines, and querying mechanisms; this coupling has made it difficult, for example, for users to employ alternative extractors that might have different strengths or understand different source languages. The TAXFORM project has sought to investigate how different reverse engineering tools can be integrated into a single framework by providing mappings to and from common data schemas for program “facts” [2]. In this paper, we describe how we successfully integrated the Acacia C and C++ fact extractors into the PBS system, and how we were then able to create software architecture models for two large software systems: the Mozilla web browser (over two million lines of C++ and C) and the VIM text editor (over 160,000 lines of C).

Architecture-based performance analysis applied to a telecommunication system

Abstract: Software architecture plays an important role in determining software quality characteristics, such as maintainability, reliability, reusability, and performance. Performance effects of architectural decisions can be evaluated at an early stage by constructing and analyzing quantitative performance models, which capture the interactions between the main components of the system as well as the performance attributes of the components themselves. The paper proposes a systematic approach to building layered queueing network (LQN) performance models from a UML description of the high-level architecture of a system and more exactly from the architectural patterns used for the system. The performance model structure retains a clear relationship with the system architecture, which simplifies the task of converting performance analysis results into conclusions and recommendations related to the software architecture. The proposed approach is applied to a telecommunication product for which an LQN model is built and analyzed. The analysis shows how the performance bottleneck is moving from component to component (hardware or software) under different loads and configurations and exposes some weaknesses in the original software architecture, which prevent the system from using the available processing power at full capacity due to excessive serialization.

BERRA: a research architecture for service robots

Abstract: The architecture for a mobile service robot is discussed. The paper covers aspects related to overall design and implementation. The robot architecture is of the hybrid deliberative/reactive behavioral type. The strategy is selection where planning is viewed as configuration. The architecture can be divided into three layers, one for deliberation, one for task execution, and one reactive layer. Scalability and a high degree of flexibility have been primary design goals, making it easy to reconfigure the system. The system has been built in an object oriented fashion. An application of the architecture has been tested in a significant number of missions in our lab, where one room has been setup as an ordinary living room.

A soft radio architecture for reconfigurable platforms

Abstract: While many soft/software radio architectures have been suggested and implemented, there remains a lack of a formal design methodology that can be used to design and implement these radios. This article presents a unified architecture for the design of soft radios on a reconfigurable platform called the layered radio architecture. The layered architecture makes it possible to incorporate all of the features of a software radio while minimizing complexity issues. The layered architecture also enables a methodology for incorporating changes and updates into the system. An example implementation of the layered architecture on actual hardware is presented.

C4ISR architectures: II. A structured analysis approach for architecture design

Abstract: A Structured Analysis based process for developing C4ISR architectures is presented. The process demonstrates the feasibility of developing architecture descriptions that conform to the C4ISR Architecture Framework based on the Structured Analysis paradigm that underlies the concepts and definitions in the Framework. Furthermore, the process incorporates the derivation of an executable model that can reveal the logical, behavioral, and performance characteristics of the architecture. The complete process is illustrated through an example involving the insertion of a new technology in a large legacy system. © 2000 John Wiley & Sons, Inc. Syst Eng 3: 248–287, 2000

Issues Concerning Variability in Software Product Lines

Abstract: Product-line architectures, i.e. a software architecture and component set shared by a family of products, represents a promising approach to achieving reuse of software. Several companies are initiating or have recently adopted a product-line architecture. However, little experience is available with respect to the evolution of the products, the software components and the software architecture. Due to the higher level of interdependency between the various software assets, software evolution is a more complex process. In this paper we discuss issues regarding variability that may help or cause problems when designing solutions for managing variability.

A Software Architecture for User Transparent Parallel Image Processing

Abstract: This paper describes a software architecture that allows image processing researchers to develop parallel applications in a transparent manner. The architecture's main component is an extensive library of data parallel low level image operations capable of running on homogeneous distributed memory MIMD-style multicomputers. Since the library has an application programming interface identical to that of an existing sequential library, all parallelism is completely hidden from the user.The first part of the paper discusses implementation aspects of the parallel library, and shows how sequential as well as parallel operations are implemented on the basis of so-called parallelizable patterns. A library built in this manner is easily maintainable, as extensive code redundancy is avoided. The second part of the paper describes the application of performance models to ensure efficiency of execution on all target platforms. Experiments show that for a realistic application performance predictions are highly accurate. These results indicate that the core of the architecture forms a powerful basis for automatic parallelization and optimization of a wide range of imaging software.

Platform independent memory image analysis architecture for debugging a computer program

Abstract: A platform independent analysis architecture analyzes memory images for computer programs. The analysis architecture is platform independent in that it is not tied to a particular version of a computer program and is not dependent on the presence or absence of patches. In addition, the analysis architecture is not tied to the hardware architecture on which the analysis architecture runs. The analysis architecture dynamically determines data type definitions for a computer program to account for the hardware architecture on which the computer program runs, the version of the computer program that is running and the presence or absence of patches. As a result, accurate views of data types may be discerned at run time so that the views of the data types may be employed in analyzing memory images such as crash dumps and run time dumps. This analysis architectures greatly assists parties in debugging computer programs as a result.

Towards a UML profile for software architecture descriptions

Abstract: To formally describe architectures of software systems, specific languages called Architecture Description Languages (ADLs) have been developed by academic institutions and research labs. However, more and more research and industrial projects are using the standard Unified Modeling Language (UML) for representing software architectures of systems. In this paper, we focus on how to extend the UML by incorporating some key abstractions found in current ADLs, such as connectors, components and configurations, and how the UML can be used for modeling architectural viewpoints. Our approach is demonstrated by the software architecture of a video surveillance system. It is therefore the purpose of the paper to show that a UML profile for software architecture abstractions is needed.

Featured-based approach to object-oriented engineering of applications for reuse

Abstract: Object-oriented technology is gaining popularity among software engineers with the goal of building reusable and adaptable software. Unfortunately, however, most methods introduced so far are not domain-oriented and do not address the issue of reuse directly. For these methods, software reuse is not the primary goal; it is only a by-product. The feature-oriented reuse method, FORM, is extended in this paper for improving the object-oriented engineering of applications for reuse. FORM concentrates on analyzing and modeling commonalities and differences in the applications of a given domain in terms of capability, operating environment, domain technology, and implementation technique features. These features are used to systematically derive objects that are tied to the features, and to develop reusable and adaptable domain architectures. We found that FORM facilitates analysis of variability (and commonality) of software before engineering and implementation start, and with this understanding, adaptability and reusability can be built into software. Feature modeling has been found to be an effective method for identifying and modeling reusable objects. Copyright © 2000 John Wiley & Sons, Ltd.

A reference architecture for Web servers

Abstract: A reference software architecture for a domain defines the fundamental components of the domain and the relations between them. Research has shown the benefits of having a reference architecture for product development, software reuse and maintenance. Many mature domains, such as compilers and operating systems, have well-known reference architectures. We present a process to derive a reference architecture for a domain. We used this process to derive a reference architecture for Web servers, which is a relatively new domain. The paper presents the mapping of this reference architecture to the architectures of three open source Web servers: Apache (80KLOC), AOL-Server (164KLOC), and Jigsaw (106KLOC).

Software architecture transformations

Abstract: In order to understand and improve software, we commonly examine and manipulate its architecture. For example, we may want to examine the architecture at different levels of abstraction or zoom-in on one portion of the system. We may discover that the extracted architecture has deviated from our mental model of the software and hence we may want to repair it. The paper identifies the commonality between these architectural transformation actions, i.e., by manipulating the architecture in order to understand analyze, and modify the software structure, we are in fact performing graph transformations. We categorize useful architectural transformations and describe them within the framework of graph transformations. By describing them in a unified way, we gain a better understanding of the transformations and thus, can work towards modeling, specifying and automating them.

Transparent redundancy in the time-triggered architecture

Abstract: The time-triggered architecture is an architecture for distributed embedded real-time systems in high dependability applications. The core element of the architecture is the time-triggered communications protocol TTP/C. This paper shows how TTP/C can be extended by a fault-tolerance layer that performs those functions that are necessary for the implementation of application redundancy. The hardware/software interface of the host computer where the application software is executing, is not changed, neither in the value domain, nor in the temporal domain, by this implementation of fault-tolerance in the communications system. Provided the application software has been properly organized it is thus possible to implement application redundancy transparently, i.e., without any modification of the function and timing of the application system. The paper also discusses the experiences gained from a prototype implementation of the fault-tolerance layer in the microprogram of a TTP/C controller chip.