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Showing papers on "Silicon nitride published in 1968"


Journal ArticleDOI
TL;DR: In this article, it was shown that boron-nitride films of up to 6000Aa thick have been deposited on a variety of substrates at 600 °-1000 °C by a reaction between diborane and ammonia in hydrogen or inert carrier gas.
Abstract: Clear, vitreous films of boron nitride up to 6000Aa thick have been deposited on a variety of substrates at 600 °–1000 °C by a reaction between diborane and ammonia in hydrogen or inert carrier gas. Deposition rate may be readily adjusted to 50–1000 Aa/min. Most samples were made at either 600° or 800°, with some attendant variation in film properties. The 600° material contains some residual B‐H bonding. The film is essentially amorphous to electron diffraction. The refractive index is 1.7–1.8, the 1 MHz dielectric constant ~ 3 1/2, the dielectric strength , and the The band gap is 3.8 ev and the phonon temperature in the neighborhood of 2000°K. For semiconductor junction protection boron nitride has no advantage over silicon nitride. 600° deposition directly on Si has produced surface charges as low as , but there are room‐temperature drifts, and high‐field conduction also. BN deposited at 800° on Si is electrically similar to silicon nitride. Etching of BN film also presents the same problems as does silicon nitride. BN is not as good a barrier against sodium ion permeation. Attack by atmospheric moisture over a long period has varied from insignificant to extensive conversion to orthoboric acid.BN film on Si dopes the substrate with boron at temperatures above 900 °C in inert ambient. Uniform junction depths are produced. D‐C conductivity in 500–4000Aa films has been studied from room temperature to 270 °C. With fields ≥ 106 v/cm BN film shows stable, nonohmic conductivity which is independent of polarity. The 25 °C d‐c conduction is describable over at least seven decades of current by , , where , . The 600°‐deposited BN is the more conductive and can carry indefinitely. is linear, and the slope of the curve is in good agreement with the theoretical value for a Frenkel‐Poole conduction mechanism. Possible use of BN as a thin film varistor is discussed.

225 citations


Journal ArticleDOI
Dale M. Brown1, P.V. Gray1, F. K. Heumann1, H. R. Philipp1, E. A. Taft1 
TL;DR: The properties of silicon nitride, oxynitride, and oxide films formed by the pyrolysis of various mixtures of,, and are presented The variation in physical, optical, and electrical properties of this oxynitized series is examined The electrical and passivation properties of these films on Si are examined and compared with oxides as discussed by the authors.
Abstract: The properties of silicon nitride, oxynitride, and oxide films formed by the pyrolysis of various mixtures of , , and are presented The variation in physical, optical, and electrical properties of this oxynitride series is examined The electrical and passivation properties of these films on Si are examined and compared with oxides These electrical data describe the general characteristics of nitride and oxynitride on top of Si and over thin (~300Aa) and thick (~1000Aa) thermal oxide films

146 citations


Journal ArticleDOI
TL;DR: The electrical properties of vapordeposited silicon nitride and silicon oxide films on silicon have been investigated in this article, showing that the silicon oxide properties are more similar to those of thermal oxides.
Abstract: The electrical properties of vapor‐deposited silicon nitride and silicon oxide films on silicon have been investigated. The silicon nitride films were produced by the reaction at 950°C, while the oxides were prepared at 400°C using the reaction. The properties were compared with those of thermal oxides prepared in dry O2 at 1200°C. As contrasted to the thermal oxides, the silicon nitride films are characterized by polarization and room temperature trapping instabilities, relatively high conductance, and high surface state charge densities. The vapor‐deposited oxides tend to resemble the nitrides in those properties which are associated with the silicon‐ dielectric interface, but the bulk properties are more like those of thermal oxides.

95 citations



Journal ArticleDOI
TL;DR: In this article, electron diffraction studies of the silicon nitride films revealed that films varied in crystallite size from <10 to ~100Aa, and Radiotracer diffusion experiments using Na22 as diffusant revealed that the smaller crystallite films were better barriers to sodium diffusion than the larger crystallite ones.
Abstract: Silicon nitride films deposited on silicon substrates by several techniques were studied. Electron diffraction studies of the films revealed that films varied in crystallite size from <10 to ~100Aa. Radiotracer diffusion experiments using Na22 as diffusant revealed that the smaller crystallite films were better barriers to sodium diffusion than the larger crystallite films. Field enhanced drift of sodium was not observed in any of the silicon nitride films regardless of crystallite size. Silicon nitride films composed of large crystallites appeared to etch faster than smaller crystallite films in dilute buffered hydrofluoric acid.

61 citations


Journal ArticleDOI
TL;DR: In this article, a gate insulator, comprising 600 A of grown silicon dioxide covered with 400 A of silicon nitride, is formed at the beginning of fabrication, where the SiSiO2 interface is established at a point where the best state-of-theart cleaning techniques can be applied to the starting material.
Abstract: Silicon insulated-gate field-effect transistors (FETs) have been fabricated by processes involving relatively non-critical photoresist and self-limiting etching steps. Important features of the method include the formation of the gate insulator under extremely clean conditions, incorporation of an alkali ion barrier (silicon nitride) to achieve stable device characteristics and automatic alignment of the gate electrode with respect to source and drain. The gate insulator, comprising 600 A of grown silicon dioxide covered with 400 A of silicon nitride, is formed at the beginning of fabrication. Thus, the SiSiO2 interface is established at a point where the best state-of-the-art cleaning techniques can be applied to the starting material. A thick (8000 A) layer of SiO2 is pyrolytically deposited over the nitride to minimize contact capacitances in the finished structure. This must be removed from the active device region, and advantage is taken of the difference in etch rate between SiO2 and silicon nitride to ensure a well-controlled gate insulator thickness. Thus the nitride layer serves the dual function of providing a barrier to mobile ions in the completed structure, and of acting as an etch-resistant layer during fabrication to achieve control over geometry. A polycrystalline layer of silicon is used to form the gate electrode, which is shaped early in the process, and is used to define the limits of the source and drain windows. This aspect of the fabrication assures self-alignment of the gate electrode with respect to source and drain. During the diffusion of source and drain regions the polycrystalline silicon is rendered sufficiently conductive that no metallization of the gate electrode is required, except at one end for contacting purposes. This eliminates the need for a critical photoresist alignment. Both n and p induced-channel (enhancement) devices have been made with this process. Turn-on voltages at 10 μA drain current of +1.35 V (n-channel) and −2.6 V (p-channel) with less than 12 per cent spread over a slice were obtained. Analysis of the device characteristics indicates field-effect mobilities of 335 and 233 cm2/V-sec for the n- and p-channel devices respectively. Aging behavior under bias at 300°C indicates the presence of residual mobile positive charge of the order of 1.5 × 1011 charges/cm2, resulting in turn-on voltage shifts of less than 1 V over several hundred hr with +10 V applied to the gate.

55 citations


Journal ArticleDOI
TL;DR: In this paper, an approximate electron energy band diagram for silicon nitride has been presented based on these values, and the threshold energy in this case is 2.11 ± 0.1 eV.
Abstract: The photoemission of both electrons and holes from degenerate silicon into thin (160–270 A) layers of silicon nitride has been observed. The threshold energies for these processes are found to be 3.17 ± 0.1 eV for electrons and 3.06 ± 0.1 eV for holes. In addition, the photoemission of electrons from aluminum into silicon nitride has been observed; the threshold energy in this case is 2.11 ± 0.1 eV. An approximate electron energy band diagram for silicon nitride based on these values is presented.

54 citations




Journal ArticleDOI
TL;DR: In this paper, the authors used radio frequency energy to deposit thin solid films of inorganic insulating materials over a wide temperature range, and showed that these films have dielectric constant values between 3.8 and 10 depending on the ratio of silane to nitrous oxide used.

42 citations



Journal ArticleDOI
TL;DR: Conduction properties of silicon nitride thin films noting temperature dependence and thermal emission as discussed by the authors, showing that the properties of these thin films are similar to those of silicon carbide thin films.
Abstract: Conduction properties of silicon nitride thin films noting temperature dependence and thermal emission

Patent
15 Aug 1968
TL;DR: In this article, the present invention relates to dielectric coatings for electronic devices such as rectifiers, transistors and capacitors, and is related to the use of silicon nitride films alone or in combination with silicon dioxide films.
Abstract: The present invention relates to dielectric coatings for electronic devices such as rectifiers, transistors and capacitors. More specifically, the invention relates to dielectric coatings comprising silicon nitride films alone or in combination with silicon dioxide films, and to methods for the production of silicon nitride coatings by reacting silane, silicon halides or halosilanes with ammonia.

Journal ArticleDOI
TL;DR: In this paper, the electrical conduction processes through silicon nitride are examined and discussed and three processes are found to occur: Frenkel-Poole emission, field ionization, and trap hopping.
Abstract: The electrical conduction processes through silicon nitride are examined and discussed. Three processes were found to occur: Frenkel–Poole emission, field ionization, and trap hopping. The characte...

Patent
William B. Pennebaker1
15 May 1968
TL;DR: In this article, radio frequency energy is applied across the spectrum and source to generate a plasma containing source materials and NITROGEN, which react to a thin film, e.g., SILICON NIT RIDE (SI3N4) or ALUMINUM NIT ride (ALN), on the surface of the screen.
Abstract: A SUBSTRATE AND SOURCE, OF SILICON (SI) OR ALUMINUM (AL), ARE POSITIONED WITHIN A NITROGEN-CONTAINING ATMOSPHERE OF LESS THAN 20 MICRONS. RADIO-FREQUENCY ENERGY IS APPLIED ACROSS THE SUBSTRATE AND SOURCE TO GENERATE A PLASMA CONTAINING SOURCE MATERIAL, AND NITROGEN WHICH REACT SO AS TO DEPOSIT A THIN INSULATING FILM, E.G., OF SILICON NITRIDE (SI3N4) OR ALUMINUM NITRIDE (ALN), RESPECTIVELY, ON THE SUBSTRATE SURFACE. PREFERABLY, THE SUBSTRATE IS MAINTAINED IN EXCESS OF 300*C. DURING THE DEPOSITION PROCESS.

Patent
30 Dec 1968
TL;DR: In this article, a single etchant process for composite layered structure of silicon nitride and silicon dioxide was proposed, where hydrogen and fluoride ion-containing aqueous etching solutions, such as hydrofluoric acid having a concentration of less than approximately 2 percent by weight, and other equivalent solutions including ammonium fluoride and ammonium bifluoride solutions and fluosilicic acid, were applied to the structure while the temperature is maintained below the boiling point of these solutions.
Abstract: A single etchant process for etching a composite layered structure of silicon nitride and silicon dioxide. Hydrogen and fluoride ion-containing aqueous etching solutions, such as hydrofluoric acid having a concentration of less than approximately 2 percent by weight, and other equivalent solutions including ammonium fluoride and ammonium bifluoride solutions and fluosilicic acid, are applied to the structure while the temperature is maintained below the boiling point of these solutions, whereby the rate of etching of the silicon nitride is substantially equal to the rate of etching of the silicon dioxide.

Journal ArticleDOI
TL;DR: In this article, permanent shifts in gate threshold voltages were measured for MOS structures with variations in the structure of the oxide insulator and compared to the shifts for pure unaltered silicon dioxide.
Abstract: Radiation-induced permanent shifts in gate threshold voltages were measured for MOS structures with variations in the structure of the oxide insulator and compared to the shifts for pure unaltered silicon dioxide. The variations include phosphosilicate glass coating of the oxide surface, aluminum ion-implantation into the surface, and a silicon nitride layer over the oxide. In all cases, the modified form became relatively insensitive to radiation under positive gate voltages and extremely sensitive to radiation under negative gate voltages in contradistinction to the pure oxide, which is much less sensitive at negative than at positive gate voltages. Only the nitride modification led eventually to hardened devices for both polarities. Analysis leads to the conclusion that the models for positive space charge buildup in the oxide must include photoemission of electrons into the oxide from either the silicon or the metal gate, depending on the gate voltage, and also the possibility of mobile holes.

Patent
Johannes Burkhardt Paul1
10 Oct 1968
TL;DR: In this paper, a method for producing extremely thin, free-standing or unSUPPORTED SILICON NITRIDE movies is presented. But the method is not suitable for outdoor scenes.
Abstract: A METHOD IS PROVIDED FOR PRODUCTING EXTREMELY THIN, FREE-STANDING OR UNSUPPORTED FILMS OF SILICON NITRIDE, HAVING THE FORMULA SI3N4. THE METHOD INCLUDES THE INITIAL STEP OF SPUTTERED DEPOSITING ON A MOLYBDENUM SUBSTRATE, A THIN LAYER OF SILICON NITRIDE. THE ASSEMBLY IS THEN LOCATED IN AN OVEN, HEATED TO A TEMPERATURE RANGING FROM 500*C. TO 900*C., AND CHLORINE GAS INTRODUCED INTO THE OVEN. IN THIS MANNER, GASEOUS DISSOLUTION OF THE SUBSTRATE IS EFFECTED, RESULTING IN THE PRODUCTION OF THE FREE-STANDING FILM OF SILICON NITRIDE.

Patent
Else Kooi1
19 Nov 1968
TL;DR: In this paper, the authors describe a semiconductor device having an insulating layer having a first portion of silicon oxide without silicon nitride and a second portion of polysilicon oxide covered with silicon oxide, and these layers are provided so as to establish at the semiconductor surface certain desired concentrations or densities of semiconductive surface states and surface or oxide charges.
Abstract: Semiconductor devices are described having on a semiconductor surface an insulating layer having a first portion of silicon oxide without silicon nitride and a second portion of silicon oxide covered with silicon nitride. These layers are provided so as to establish at the semiconductor surface certain desired concentrations or densities of semiconductive surface states and surface or oxide charges in order to control the performance of the device.

Journal ArticleDOI
TL;DR: In this paper, a qualitative study of the masking properties of thin (≤1500Aa) silicon nitride and silicon oxynitride films on Si is presented.
Abstract: A qualitative study of the masking properties of thin (≤1500Aa) silicon nitride and silicon oxynitride films on Si is presented. A range of diffusion conditions was studied for doping sources including B, P, Ga, and As. Silicon nitride was not found to be a diffusion mask for all conditions. Conditions under which it can be expected to mask are specified.

Patent
11 Jul 1968
TL;DR: In this article, a low temperature deposition of silicon oxynitride on an integrated circuit device is accomplished by reactive sputtering of high-purity silicon source material in the presence of nitrous oxide and nitrogen.
Abstract: Low temperature deposition of silicon oxynitride on an integrated circuit device is accomplished by the reactive sputtering of high-purity silicon source material in the presence of nitrous oxide and nitrogen. The deposited silicon oxynitride is characterized by an etch rate, breakdown strength and yield higher than those of silicon nitride and a dielectric constant higher than that of silicon oxide.

Journal ArticleDOI
TL;DR: In this paper, a simple non-destructive interferometric method of measuring the thickness of transparent films on a reflecting substrate in the range 0β01 to about 0β6 μ is described.
Abstract: A simple, non-destructive interferometric method of measuring the thickness of transparent films on a reflecting substrate in the range 0β01 to about 0β6 μ is described. As the incident and reflected rays are directed through the objective of a metallurgical microscope, the region investigated (about 1 mm 2 ) can be examined simultaneously for cleanliness and uniformity. The intensity of the monochromatic reflected light, weakened more or less by interference, is measured by means of a photoresistor located in the ocular tube or the photo tube of the microscope. As examples, the reflection formulas for silicon dioxide and silicon nitride on silicon, and silicon dioxide on germanium, are numerically evaluated and presented in such a form that the thickness can be read directly as a function of the measured reflection. The error lies below 10 nm.

Journal ArticleDOI
TL;DR: In this article, a junction seal consisting of a metal-insulator-silicon (MIS) system of materials has been developed to replace the vacuum-tight encapsulation.
Abstract: Most semiconductor devices today have a costly vacuum-tight encapsulation that provides a microenvironment for high reliability and electrical connections to the circuit in which it is used. A junction seal consisting of a metal-insulator-silicon (MIS) system of materials has been developed to replace the vacuum-tight encapsulation. The MIS junction seal, consisting of platinum silicide-titanium-platinum-gold contacts and a Silicon nitride overcoat, provides the necessary encapsulation for high reliability. Electrical and mechanical connections are provided by gold beam-deads. During fabrication, the contact windows are opened in the deposited silicon nitride layer either by etching with boiling phosphoric acid using SiO 2 as a mask or by anodically converting the silicon nitride in the windows to a soluble oxide. The multilayer contact is then applied to complete the junction seal. The initial characteristics of sealed-junction transistors fabricated by the above methods were similar to those of the unsealed transistors. The reliability of the sealed-junction transistors determined by accelerated aging after an intentional sodium contaminafion of 1017atoms/cm2surpassed that of the standard silicon planar transistors sealed in a vacuum-tight enclosure.

Patent
Masaya Ohta1
01 May 1968
TL;DR: In this paper, a method of manufacturing a semiconductor device comprising selective etching of a phosphorus glass layer covering the surface of a substrate using a silicon nitride film selectively formed on said glass layer as a mask is described.
Abstract: A method of manufacturing a semiconductor device comprising selective etching of a phosphorus glass layer covering the surface of a semiconductor substrate using a silicon nitride film selectively formed on said glass layer as a mask.

Patent
18 Apr 1968
TL;DR: In this article, a sputtered film on a silicon substrate is created, the film being a graded composition ranging from pure SiO2 to pure Si3N4 and the composition resulting therefrom.
Abstract: Formation of a sputtered film on a silicon substrate, said film being a graded composition ranging from pure SiO2 to pure Si3N4 and the composition resulting therefrom.

Patent
30 Dec 1968
TL;DR: In this article, a process of fabricating a MISFET in which a PAIR of SPACED APART DOPED SILICON DIOXIDE BODIES is formed on the surface of a SILICon SUBSTRATE is described.
Abstract: A PROCESS OF FABRICATING A MISFET IN WHICH A PAIR OF SPACED APART DOPED SILICON DIOXIDE BODIES IS FORMED ON THE SURFACE OF A SILICON SUBSTRATE. A LAYER OF SILCON NITRIDE IS FORMED OVER THE SURFACE OF THE BODIES AND THE SUBSTRATE AND THE PORTION OF THE LAYERS IN THE SPACE BETWEEN THE BLOCKS IS REMOVED. A THIN LAYER OF THE SILCON SUBSTRATE IS THEN REMOVED FROM THE SPACE BETWEEN THESE BODIES AND A RELATIVELY THIN SILICON DIOXIDE LAYER IS FORMED ON THE SILICON SUBSTRATE IN THIS SPACE. A SECOND LAYER OF SILICON NITRIDE IS THEN FORMED OVER THE FIRST SILICON NITRIDE LAYER AND THE SILICON DIOXIDE LAYER THEREBY TO FORM A DIELECTRIC REGION FOR THE GATE OF THE TRANSISTOR. THEREAFTER SOURCE AND DRAIN REGIONS ARE FORMED BY DIFFUSING IMPURTIES FROM THE DOPED SILICON BLOCKS INTO UNDERLYING PORTIONS OF THE SILICON SUBSTRATE THEREBY FORMING SOURCE AND DRAIN REGIONS, THE SILICON NITRIDE LAYERS PREVENTING OUT-DIFFUSION OF THE DOPANT FROM THE DOPED BODIES AND THE SECOND SILICON NITRIDE LAYER COVERING ANY GAPS BETWEEN THE SILICON DIOXIDE LAYER IN THE GATE REGION BETWEEN THE SILCON DIOXIDE LAYER AND THE FIRST SILICON LAYER.

Journal ArticleDOI
Haruo Yamagishi1
TL;DR: Temperatvre dependence of the surface potential (total bending of bands) in Si(111) surfaces (n - and p -type bulk) deposited with a silicon dioxide and a silicon nitride was obtained by measuring the saturation value of surface photovoltage, in the range between 150 and 600°K.
Abstract: Temperatvre dependence of the surface potential (total bending of bands) in Si(111) surfaces ( n - and p -type bulk) deposited with a silicon dioxide and a silicon nitride was obtained by measuring the saturation value of surface photovoltage, in the range between 150 and 600°K. Substantially similar results were obtained for both the surfaces. Bands always bend upward in n - and downward in p -type Si. In Si crystals with relatively high impurity concentrations, the bending of bands was founds to decrease linearly with elevating temperature and in Si with relatively low impurity concentrations, the bending of bands also decreases linearly with temperature but levels off, tending to the flat bands. These results are well explained by assuming that there is a surface state band of a hyperbolic cosine from having a neutral point around the gap center and the Fermi level at the Si surfaces in nearly stabilized in a wide range of temperature. Total number of surface states estimated from the above distributio...

Journal ArticleDOI
TL;DR: In this paper, the vapor growth of silicon nitride film is studied thermodynamically for SiH4-NH3-H2 and SiCl 4-NH 3-H 2 systems.
Abstract: The vapor growth of silicon nitride film is studied thermodynamically for SiH4-NH3-H2 and SiCl4-NH3-H2 systems. By calculating the partial pressures of gaseous species involved in the reactions, the deposition rates of silicon nitride are determined. The theoretical results for SiH4-NH3-H2 system are compared with the experimental data obtained by Bean et al. and the agreements are found quite good, indicating that an equilibrium or at least a quasi-equilibrium is always established. However for SiCl4-NH3-H2 system the agreements are rather poor, suggesting the deviation from the quasi-equilibrium states or the existence of the complex chemical intermediates etc.

Patent
Marnix Guillaume Collet1
20 May 1968
TL;DR: In this article, a method of applying a layer of silicon nitride to the surface of a semiconductor substrate was proposed, where the silicon oxide is formed in a gaseous phase containing compounds of silicon and nitrogen which decompose and react in the presence of high-energy radiation.
Abstract: A method of applying a layer of silicon nitride to the surface of a semiconductor substrate wherein the silicon nitride is formed in a gaseous phase containing compounds of silicon and nitrogen which decompose and react in the presence of high-energy radiation e.g. ultraviolet radiation present in the gaseous phase to produce silicon nitride.

Patent
25 Sep 1968
TL;DR: In this article, a solid state memory element is provided in an MIS structure, where charges in the insulator layer are reproducibly and stably controlled with respect to bias potential applied across the metal and semiconductor layers, and the direction of the bias potential variation is of a polarity to effect turn on of Pchannel MIS transistors.
Abstract: A solid state memory element next provided in an MIS structure. Charges in the insulator layer are reproducibly and stably controlled with respect to bias potential applied across the metal and semiconductor layers. The direction of the bias potential variation is of a polarity to effect turn on of Pchannel MIS transistors. In a preferred form the memory element employs as the insulator a first layer of silicon dioxide next to the semiconductor, a layer of silicon nitride, and a second layer of silicon dioxide.