This survey deals with 1/f noise in homogeneous semiconductor samples. A distinction is made between mobility noise and number noise. It is shown that there always is mobility noise with an /spl alpha/ value with a magnitude in the order of 10/sup -4/. Damaging the crystal has a strong influence on /spl alpha/, /spl alpha/ may increase by orders of magnitude. Some theoretical models are briefly discussed none of them can explain all experimental results. The /spl alpha/ values of several semiconductors are given. These values can be used in calculations of 1/f noise in devices. >

1/f Noise Sources

Effect of gate engineering in double-gate MOSFETs for analog/RF applications

In this paper, an extensive study on the intermodulation distortion and the linearity of gate-material-engineered cylindrical-gate MOSFET (GME CGT MOSFET) has been done, and the influence of technology variations such as channel length and gate material workfunction variations is explored using an ATLAS 3-D device simulator. The simulation results reveal that the GME CGT MOSFET design displays a significant enhancement in the device's linearity and intermodulation distortion performance in terms of the figure-of-merit metrics VIP2, VIP3, IIP3, and IMD3 and the higher order transconductance coefficients gm1, gm2, and gm3. The results are, thus, useful for optimizing the device bias point for RFIC design with higher efficiency and better linearity performance.

An Investigation of Linearity Performance and Intermodulation Distortion of GME CGT MOSFET for RFIC Design

A 2-D closed form, analytical compact model for long- and short-channel junctionless accumulation mode double gate MOSFETs is presented. The physics-based 2-D model for the potential is derived with the help of Poisson's equation and the conformal mapping technique by Schwarz-Christoffel. From this closed-form solution, we derive simple equations for the calculation of the threshold voltage VT and subthreshold slope S. Using Lambert's W-function and a smoothing function for the transition between the depletion and accumulation regions, a unified charge model valid for all operating regimes is developed. Dependencies between the physical device parameters and their impact on the device performance are worked out. A comparison of our 2-D physics-based compact model is done versus 2-D technology computer-aided design (TCAD) Sentaurus simulation data.

Compact Model for Short-Channel Junctionless Accumulation Mode Double Gate MOSFETs

A simple threshold voltage model of an undoped symmetrical double-gate MOSFET has been developed, based on an analytical solution of Poisson's equation for the potential distribution. The model has been verified by comparing the threshold voltage roll-off with the channel length with simulation results for different silicon thicknesses, gate oxide thicknesses, and drain voltage values. Good agreement between model and simulation results is obtained by calibrating the minimum carrier charge sheet density adequate to achieve the turn-on condition.

Threshold Voltage Model for Short-Channel Undoped Symmetrical Double-Gate MOSFETs

A simple analytical expression of the 2-D potential distribution along the channel of silicon symmetrical double-gate (DG) MOSFETs in weak inversion is derived. The analytical solution of the potential distribution is compared with the numerical solution of the 2-D Poisson's equation in terms of the channel length L, the silicon thickness t Si, and the gate oxide thickness t OX. The obtained results show that the analytical solution describes, with good accuracy, the potential distribution along the channel at different positions from the gate interfaces for well-designed devices when the ratio of L/t Si is ges 2-3. Based on the 2-D extra potential induced in the silicon film due to short-channel effects (SCEs), a semi-analytical expression for the subthreshold drain current of short-channel devices is derived. From the obtained subthreshold characteristics, the extracted device parameters of the subthreshold slope, drain-induced barrier lowering, and threshold voltage are discussed. Application of the proposed model to devices with silicon replaced by germanium demonstrates that the germanium DG MOSFETs are more prone to SCEs.

Semi-Analytical Modeling of Short-Channel Effects in Si and Ge Symmetrical Double-Gate MOSFETs

A simple analytical expression of the 3-D potential distribution along the channel of lightly doped silicon trigate MOSFETs in weak inversion is derived, based on a perimeter-weighted approach of symmetric and asymmetric double-gate MOSFETs. The analytical solution is compared with the numerical solution of the 3-D Poisson's equation in the cases where the ratios of channel length/silicon thickness and channel length/channel width are ges 2. Good agreement is achieved at different positions within the channel. The perimeter-weighted approach fails at the corner regions of the silicon body; however, by using corner rounding and undoped channel to avoid corner effects in simulations, the agreement between model and simulation results is improved. By using the extra potential induced in the silicon film due to short-channel effects, the subthreshold drain current is determined in a semianalytical way, from which the subthreshold slope, the drain-induced barrier lowering, and the threshold voltage are extracted.

Semianalytical Modeling of Short-Channel Effects in Lightly Doped Silicon Trigate MOSFETs

An analytical compact drain current model for undoped (or lightly doped) short-channel triple-gate fin-shaped field-effect transistors (finFETs) is presented, taking into account quantum-mechanical and short-channel effects such as threshold-voltage shifts, drain-induced barrier lowering, and subthreshold slope degradation. In the saturation region, the effects of series resistance, surface roughness scattering, channel length modulation, and saturation velocity were also considered. The proposed model has been validated by comparing the transfer and output characteristics with device simulations and with experimental results. The good accuracy and the symmetry of the model make it suitable for implementation in circuit simulation tools.

Compact Model of Drain Current in Short-Channel Triple-Gate FinFETs

A fully analytical potential model, valid in the weak inversion regime of short-channel cylindrical gate-all-around (GAA) MOSFET, is proposed. The model derivation is based on a previous analytical expression for tetragonal GAA MOSFET and the rotational symmetry of the tetragonal cross section. Device simulations were performed to verify that the potential distribution along the channel is properly described in all positions within the silicon body. Using the potential model, analytical expressions for the threshold voltage, subthreshold swing and drain-induced barrier lowering have been derived. Including the short-channel effects within an existing model for the subthreshold leakage current and an analytical drain current model of long-channel devices in strong inversion, a compact drain current model has been derived describing with good accuracy the transfer and output characteristics of short-channel GAA MOSFETs in all regions of operation.

http://iopscience.iop.org/article/10.1088/0268-1242/24/7/075017/pdf

A. Tsormpatzoglou

Papers

Semi-Analytical Modeling of Short-Channel Effects in Si and Ge Symmetrical Double-Gate MOSFETs

Threshold Voltage Model for Short-Channel Undoped Symmetrical Double-Gate MOSFETs

Semianalytical Modeling of Short-Channel Effects in Lightly Doped Silicon Trigate MOSFETs

Compact Model of Drain Current in Short-Channel Triple-Gate FinFETs

A compact drain current model of short-channel cylindrical gate-all-around MOSFETs