Abhinav Kranti

TL;DR: In this article, the analog properties of nMOS junctionless (JL) multigate transistors are compared with those exhibited by inversion-mode (IM) trigate devices of similar dimensions.

TL;DR: In this paper, the conduction mechanisms in three types of MOS devices: inversion-mode, accumulation-mode and junctionless MOSFETs are compared, and it is shown that junctionless transistors have different conduction properties from those of normal MOSFs.

TL;DR: In this paper, the authors demonstrate the usefulness of ultralow power junctionless (JL) MOSFETs in achieving improved analog/RF metrics as compared to non-underlap and underlap devices.

TL;DR: In this article, the potential of junctionless (JL) MOS transistors for ultra low power (ULP) subthreshold logic applications was reported, which showed that double gate (DG) JL devices, which do not require source or drain extension region engineering, can perform significantly better than conventional inversion mode devices, and comparable with underlap DG MOSFETs for ULP applications.

TL;DR: In this article, dual ion beam sputtering fabrication of an Al/ZnO/Al memristor displaying forming-free bipolar resistive switching characteristics with memristive behavior without necessitating any post-processing steps.