This review covers important advances in recent years in the physics of thin-film ferroelectric oxides, the strongest emphasis being on those aspects particular to ferroelectrics in thin-film form. The authors introduce the current state of development in the application of ferroelectric thin films for electronic devices and discuss the physics relevant for the performance and failure of these devices. Following this the review covers the enormous progress that has been made in the first-principles computational approach to understanding ferroelectrics. The authors then discuss in detail the important role that strain plays in determining the properties of epitaxial thin ferroelectric films. Finally, this review ends with a look at the emerging possibilities for nanoscale ferroelectrics, with particular emphasis on ferroelectrics in nonconventional nanoscale geometries.

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Physics of thin-film ferroelectric oxides

The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (14?nm) that its leakage current is too large It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (?) or 'high K' gate oxides such as hafnium oxide and hafnium silicate These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects Intensive research was needed to develop these oxides as high quality electronic materials This review covers both scientific and technological issues?the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts The oxygen vacancy is the dominant electron trap It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind Issues about work function control in metal gate electrodes are discussed

https://iopscience.iop.org/article/10.1088/0034-4885/69/2/R02/pdf

High dielectric constant gate oxides for metal oxide Si transistors

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (κ) or 'high K' gate oxides such as hafnium oxide and hafnium silicate. Little was known about such oxides, and it was soon found that in many respects they have inferior electronic properties to SiO2 ,s uch as a tendency to crystallise and a high concentration of electronic defects. Intensive research is underway to develop these oxides into new high quality electronic materials. This review covers the choice of oxides, their structural and metallurgical behaviour, atomic diffusion, their deposition, interface structure and reactions, their electronic structure, bonding, band offsets, mobility degradation, flat band voltage shifts and electronic defects. The use of high K oxides in capacitors of dynamic random access memories is also covered.

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High dielectric constant oxides

The integration of ferroelectric oxide films into microelectronic devices, combined with the size reduction constraints imposed by the semiconductor industry, have revived interest in the old question concerning the possible existence of a critical thickness for ferroelectricity. Current experimental techniques have allowed the detection of ferroelectricity in perovskite films down to a thickness of 40 A (ten unit cells), ref. 3. Recent atomistic simulations have confirmed the possibility of retaining the ferroelectric ground state at ultralow thicknesses, and suggest the absence of a critical size. Here we report first-principles calculations on a realistic ferroelectric-electrode interface. We show that, contrary to current thought, BaTiO3 thin films between two metallic SrRuO3 electrodes in short circuit lose their ferroelectric properties below a critical thickness of about six unit cells (approximately 24 A). A depolarizing electrostatic field, caused by dipoles at the ferroelectric-metal interfaces, is the reason for the disappearance of the ferroelectric instability. Our results suggest the existence of a lower limit for the thickness of useful ferroelectric layers in electronic devices.

Critical thickness for ferroelectricity in perovskite ultrathin films

The development of transparent p-type oxide semiconductors with good performance may be a true enabler for a variety of applications where transparency, power efficiency, and greater circuit complexity are needed. Such applications include transparent electronics, displays, sensors, photovoltaics, memristors, and electrochromics. Hence, here, recent developments in materials and devices based on p-type oxide semiconductors are reviewed, including ternary Cu-bearing oxides, binary copper oxides, tin monoxide, spinel oxides, and nickel oxides. The crystal and electronic structures of these materials are discussed, along with approaches to enhance valence-band dispersion to reduce effective mass and increase mobility. Strategies to reduce interfacial defects, off-state current, and material instability are suggested. Furthermore, it is shown that promising progress has been made in the performance of various types of devices based on p-type oxides. Several innovative approaches exist to fabricate transparent complementary metal oxide semiconductor (CMOS) devices, including novel device fabrication schemes and utilization of surface chemistry effects, resulting in good inverter gains. However, despite recent developments, p-type oxides still lag in performance behind their n-type counterparts, which have entered volume production in the display market. Recent successes along with the hurdles that stand in the way of commercial success of p-type oxide semiconductors are presented.

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Recent Developments in p-Type Oxide Semiconductor Materials and Devices.

Hafnium oxynitride (HfOxNy) gate dielectric was prepared using reactive sputtering followed by postdeposition annealing at 650 °C in a N2 ambient. Nitrogen incorporation in the dielectric was confirmed by x-ray photoelectron spectroscopy analysis. In comparison to HfO2 of the same physical thickness, HfOxNy gate dielectric showed lower equivalent oxide thickness (EOT) and lower leakage density (J). Even after a high-temperature postmetal anneal at 950 °C, an EOT of 9.6 A with J of 0.8 mA/cm2 @−1.5 V was obtained. In contrast, J of ∼20 mA/cm2 @−1.5 V for HfO2 with an EOT of 10 A was observed. The lower leakage current and superior thermal stability of HfOxNy can be attributed to the formation of silicon–nitrogen bonds at the gate dielectric/Si interface and strengthened immunity to oxygen diffusion by the incorporated nitrogen.

Bonding states and electrical properties of ultrathin HfOxNy gate dielectrics

Electrical conduction mechanisms for Pt/(Ba0.5Sr0.5)TiO3 (BST)/Pt, IrO2/BST/IrO2, and Pt/BST/IrO2 capacitors were studied. The Pt/BST/Pt capacitor shows a Schottky emission behavior with interface potential barrier heights of about 1.5–1.6 eV. The barrier height is largely determined by the surface electron trap states of the BST. The IrO2/BST interface shows an ohmic contact nature due to the elimination of the surface trap states as the result of the formation of strong chemical bonds between the IrO2 and BST which results in the Poole–Frenkel emission conduction mechanism. Pt/BST/IrO2 capacitor shows Schottky emission behavior and a positive temperature coefficient of resistivity (PTCR) effect depending on the bias polarity. The electron trap states at the Pt/BST interface and the positive space charges within the carrier depletion layer result in the PTCR effect.

A comparative study on the electrical conduction mechanisms of (ba0.5sr0.5)tio3 thin films on pt and iro2 electrodes

The electrical conduction properties of rf sputter-deposited (Ba, Sr)TiO3 (BST) films on Pt and IrO2 electrodes and metalorganic chemical vapor deposited (MOCVD) BST films on a Pt electrode were investigated and a new energy band model that satisfactorily explains the observed leakage current characteristics and film thickness dependent dielectric properties is proposed. The BST and Pt junction constituted a blocking contact with interface potential barrier heights of 1.6–1.7 eV and 1.2 eV for the sputtered and MOCVD films, respectively. Schottky emission behavior was observed at measurement temperatures higher than 120 °C and tunneling related conduction behavior appeared below that temperature for a film thickness of 40 nm. A partial depletion model with a very thin (about 1 nm) layer devoid of space charge at the interface with the Pt electrode is proposed to explain the V1/2 dependent variation of ln(Jo) as well as the decreasing dielectric constant with decreasing film thickness.

Depletion layer thickness and Schottky type carrier injection at the interface between Pt electrodes and (Ba, Sr)TiO3 thin films

Bias-temperature instabilities (BTI) of HfO/sub 2/ metal oxide semiconductor field effect transistors (MOSFETs) have been systematically studied for the first time. NMOS positive BTI (PBTI) exhibited a more significant V/sub t/ instability than that of PMOS negative BTI (NBTI), and limited the lifetime of HfO/sub 2/ MOSFETs. Although high-temperature forming gas annealing (HT-FGA) improved the interface quality by passivating the interfacial states with hydrogen, BTI behaviors were not strongly affected by the technique. Charge pumping measurements were extensively used to investigate the nature of the BTI degradation, and it was found that V/sub t/ degradation of NMOS PBTI was primarily caused by charge trapping in bulk HfO/sub 2/ rather than interfacial degradation. Deuterium (D/sub 2/) annealing was found to be an excellent technique to improve BTI immunity as well as to enhance the mobility of HfO/sub 2/ MOSFETs.

Bias-temperature instabilities of polysilicon gate HfO/sub 2/ MOSFETs

Electrical and material characteristics of hafnium oxynitride (HfON) gate dielectrics have been studied in comparison with HfO/sub 2/. HfON was prepared by a deposition of HfN followed by post-deposition-anneal (PDA). By secondary ion mass spectroscopy (SIMS), incorporated nitrogen in the HfON was found to pile up at the dielectric/Si interface layer. Based on the SIMS profile, the interfacial layer (IL) composition of the HfON films appeared to be like hafnium-silicon-oxynitride (HfSiON) while the IL of the HfO/sub 2/ films seemed to be hafnium-silicate (HfSiO). HfON showed an increase of 300/spl deg/C in crystallization temperature compared to HfO/sub 2/. Dielectric constants of bulk and interface layer of HfON were 21 and 14, respectively. The dielectric constant of interfacial layer in HfON (/spl sim/14) is larger than that of HfO/sub 2/ (/spl sim/7.8). HfON dielectrics exhibit /spl sim/10/spl times/ lower leakage current (J) than HfO/sub 2/ for the same EOTs before post-metal anneal (PMA), while /spl sim/40/spl times/ lower J after PMA. The improved electrical properties of HfON over HfO/sub 2/ can be explained by the thicker physical thickness of HfON for the same equivalent oxide thickness (EOT) due to its higher dielectric constant as well as a more stable interface layer. Capacitance hysteresis (/spl Delta/V) of HfON capacitor was found to be slightly larger than that of HfO/sub 2/. Without high temperature forming gas anneal, nMOSFET with HfON gate dielectric showed a peak mobility of 71 cm/sup 2//Vsec. By high temperature forming gas anneal at 600/spl deg/C, mobility improved up to 256 cm/sup 2//Vsec.

Chang Seok Kang

Papers

Bonding states and electrical properties of ultrathin HfOxNy gate dielectrics

A comparative study on the electrical conduction mechanisms of (ba0.5sr0.5)tio3 thin films on pt and iro2 electrodes

Depletion layer thickness and Schottky type carrier injection at the interface between Pt electrodes and (Ba, Sr)TiO3 thin films

Bias-temperature instabilities of polysilicon gate HfO/sub 2/ MOSFETs

The electrical and material characterization of hafnium oxynitride gate dielectrics with TaN-gate electrode