D
David Z. Pan
Researcher at University of Texas at Austin
Publications - 557
Citations - 12677
David Z. Pan is an academic researcher from University of Texas at Austin. The author has contributed to research in topics: Computer science & Routing (electronic design automation). The author has an hindex of 50, co-authored 496 publications receiving 10182 citations. Previous affiliations of David Z. Pan include University of California, Los Angeles & Fudan University.
Papers
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Proceedings ArticleDOI
TSV stress aware timing analysis with applications to 3D-IC layout optimization
TL;DR: Systematic TSV stress aware timing analysis is proposed and it is shown that stress-aware perturbation could reduce cell delay by up to 14.0% and critical path delay by 6.5% in a test case.
Journal ArticleDOI
Design for Manufacturing With Emerging Nanolithography
TL;DR: This paper surveys key design for manufacturing issues for extreme scaling with emerging nanolithography technologies, including double/multiple patterning lithography, extreme ultraviolet lithographic, and electron-beam lithography.
Proceedings ArticleDOI
CELONCEL: effective design technique for 3-D monolithic integration targeting high performance integrated circuits
Shashikanth Bobba,Ashutosh Chakraborty,Olivier P. Thomas,Perrine Batude,Thomas Ernst,O. Faynot,David Z. Pan,Giovanni De Micheli +7 more
TL;DR: This work proposes two different strategies of stacking standard cells in 3-D without breaking the regularity of the conventional design flow: a) Vertical stacking of diffusion areas (Intra-Cell stacking) that supports complete reuse of 2-D physical design tools and b) vertical stacking of cells over others (Cell-on-Cell stacks).
Proceedings ArticleDOI
Provably secure camouflaging strategy for IC protection
TL;DR: A quantitative security criterion is proposed for de-camouflaging complexity measurements and formally analyzed through the demonstration of the equivalence between the existing de-Camouflaging strategy and the active learning scheme and a provably secure camouflaging framework is developed by combining these two techniques.
Proceedings ArticleDOI
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router
TL;DR: Experimental results show that BoxRouter 2.0 has better routability with comparable wirelength than other routers on ISPD07 benchmark, and it can complete (no overflow) ISPD98 benchmark for the first time in the literature with the shortest wirelength.