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Eric Beyne
Researcher at Katholieke Universiteit Leuven
Publications - 664
Citations - 10608
Eric Beyne is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Wafer & Die (integrated circuit). The author has an hindex of 44, co-authored 626 publications receiving 9619 citations. Previous affiliations of Eric Beyne include IMEC & Siemens.
Papers
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Journal ArticleDOI
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology
G. Van der Plas,Paresh Limaye,Igor Loi,Abdelkarim Mercha,Herman Oprins,C. Torregiani,Steven Thijs,Dimitri Linten,Michele Stucchi,G. Katti,Dimitrios Velenis,Vladimir Cherman,Bart Vandevelde,V. Simons,I. De Wolf,Riet Labie,D. Perry,S Bronckers,N. Minas,Miro Cupac,Wouter Ruythooren,J. Van Olmen,Alain Phommahaxay,M. de Potter de ten Broeck,A. Opdebeeck,Michal Rakowski,B. De Wachter,Morin Dehan,Marc Nelis,Rahul Agarwal,Antonio Pullini,Federico Angiolini,Luca Benini,Wim Dehaene,Youssef Travaly,Eric Beyne,Pol Marchal +36 more
TL;DR: Experimental results of a 3-D Network-on-Chip implementation demonstrate that the NoC concept can be extended from 2-D SoC to 3- D SoCs at low area and power and digital gates can directly drive signals through TSVs at high speed and low power.
Patent
Method of fabrication of a microstructure having an internal cavity
TL;DR: In this article, a method of fabricating a microstructure having an inside cavity is described, which includes depositing a first layer or a first stack of layers in a substantially closed geometric configuration on a first substrate and then aligning and bonding the first substrate on a second substrate such that a micro structure having a cavity is formed according to the closed geometry configuration.
Journal ArticleDOI
MEMS for wireless communications: 'from RF-MEMS components to RF-MEMS-SiP'
TL;DR: In this article, the progress in RF-MEMS from a device and integration perspective is reviewed, and the worldwide state-of-the-art of RFMEMS devices including switches, variable capacitors, resonators and filters are described.
Proceedings ArticleDOI
3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias
Bart Swinnen,Wouter Ruythooren,P. De Moor,L. Bogaerts,L. Carbonell,K. De Munck,B. Eyckens,Serguei Stoukatch,D. Sabuncuoglu Tezcan,Zsolt Tokei,Jan Vaes,J. Van Aelst,Eric Beyne +12 more
TL;DR: Using standard single damascene type techniques on bulk-Si, combined on one hand with extreme wafer thinning and on the other with Cu-Cu thermo-compression bonding technology, the authors demonstrate yielding 10k through-wafer 3D-via chains with a via pitch of 10μm for a via diameter of 5μm.
Patent
Method of transferring ultra-thin substrates and application of the method to the manufacture of a multi-layer thin film device
TL;DR: In this paper, a method of transfer of a first planar substrate with two major surfaces to a second substrate, comprising the steps of attaching one of the major surfaces of the first substrate to a carrier by means of a release layer, and attaching the other major surface of the one substrate to the second substrate with a curable polymer adhesive layer, was presented.