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Johann W. Kolar

Researcher at ETH Zurich

Publications -  1009
Citations -  44219

Johann W. Kolar is an academic researcher from ETH Zurich. The author has contributed to research in topics: Rectifier & Three-phase. The author has an hindex of 97, co-authored 965 publications receiving 36902 citations. Previous affiliations of Johann W. Kolar include Alstom & Infineon Technologies.

Papers
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Proceedings ArticleDOI

A novel single-switch three-phase AC/DC buck-boost converter with high-quality input current waveforms and isolated DC output

TL;DR: In this paper, a three-phase single-switch AC-DC flyback power converter system is presented, which operates in the discontinuous mode, and the simple structure of its power and control circuit, low mains current distortion and resistive fundamental behavior as well as the high-frequency isolation of the controlled output voltage are pointed out.
Proceedings ArticleDOI

Trends in Integration for Magnetically Levitated Pump Systems

TL;DR: In this article, a thermal model and analytical relations between the hydraulic, electric and mechanical system variables are used to optimize a magnetically levitated pump system aiming for maximum pressure density.
Journal ArticleDOI

Three-Phase Sinusoidal Output Buck-Boost GaN Y-Inverter for Advanced Variable Speed AC Drives

TL;DR: In this paper, a three-phase inverter topology, denoted as Y-VSI, is presented to cope with the wide DC voltage variation of the fuel-cell/battery that supplies the motor drive.
Proceedings ArticleDOI

99% efficient three-phase buck-type SiC MOSFET PFC rectifier minimizing life cycle cost in DC data centers

TL;DR: In this article, a three-phase buck-type PFC rectifier with integrated active 3rd harmonic current injection for dc power distribution systems is presented, and the authors show that a peak efficiency of 99% is theoretically and economically feasible with state-of-the-art SiC MOSFETs and magnetic components.
Proceedings ArticleDOI

A simple, low cost gate drive method for practical use of SiC JFETs in SMPS

TL;DR: A simple and effective method of driving the new devices with existing monolithic gate drive circuits is proposed by applying a constant negative DC bias to the gate in order to minimize the required voltage swing on the gate to enable switching to take place.