L
Ludo Deferm
Researcher at Katholieke Universiteit Leuven
Publications - 84
Citations - 815
Ludo Deferm is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: CMOS & Bipolar junction transistor. The author has an hindex of 15, co-authored 84 publications receiving 805 citations.
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Analysis of the enhanced hot-electron injection in split-gate transistors useful for EEPROM applications
TL;DR: In this article, the authors used charge-pumping measurements and device simulations to analyze the electron injection and to determine its exact position in the transistor channel, and determined the width of the spacer between both transistor gate has been determined to be an important injection parameter.
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HIM0S-a high efficiency flash E/sup 2/PROM cell for embedded memory applications
TL;DR: A flash E/sup 2/PROM device which is programmed with a highly efficient hot-electron injection mechanism is described, which combines a very high programming speed at 5-V-only operation with a low development entry cost, which renders it highly attractive for embedded memory applications.
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The behavior of silicon p‐n junction‐based devices at liquid helium temperatures
TL;DR: In this article, the forward currentvoltage characteristics of Si pn junction diodes, fabricated in different state-of-the-art complementary metaloxide-semiconductor (CMOS) technologies, are investigated at liquid helium temperatures.
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Impact of polysilicon emitter interfacial layer engineering on the 1/f noise of bipolar transistors
TL;DR: In this paper, the trade off between current gain enhancement and increased 1/f noise was discussed for various interfacial oxide thicknesses and emitter annealing conditions for polysilicon emitter bipolar transistors.
A new quantitative model to predict SILC-related disturb characteristics in Flash E2PROM devices
Jan De Blauwe,Jan Van Houdt,Dirk Wellekens,Robin Degraeve,Philippe Roussel,Luc Haspeslagh,Ludo Deferm,Guido Groeseneken,Herman Maes +8 more
TL;DR: A new quantitative model is developed that allows an excellent prediction of the disturb behavior of tunnel oxide flash E/sup 2/PROM devices after write/erase cycling and provides a well-understood and consistent cell optimization procedure.