S
S. Moccio
Researcher at Alcatel-Lucent
Publications - 11
Citations - 1447
S. Moccio is an academic researcher from Alcatel-Lucent. The author has contributed to research in topics: Gate oxide & MOSFET. The author has an hindex of 10, co-authored 11 publications receiving 1405 citations.
Papers
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Journal ArticleDOI
The electronic structure at the atomic scale of ultrathin gate oxides
TL;DR: In this paper, the authors used electron-energy-loss spectroscopy in a scanning transmission electron microscope to measure the chemical composition and electronic structure, at the atomic scale, across gate oxides as thin as one nanometre.
Proceedings ArticleDOI
Low leakage, ultra-thin gate oxides for extremely high performance sub-100 nm nMOSFETs
Gregory Timp,Aditya Agarwal,Frieder H. Baumann,T. Boone,M. Buonanno,R. Cirelli,Vincent M. Donnelly,Majeed A. Foad,D. Grant,Martin L. Green,H.-J. Gossmann,Steven James Hillenius,J. Jackson,Dale Conrad Jacobson,Rafael N. Kleiman,F.P. Klemens,J.T.-C. Lee,William M. Mansfield,S. Moccio,A. Murrell,M. L. O’Malley,J. Rosamilia,J. Sapjeta,P.J. Silverman,T.W. Sorsch,W.W. Tai,Donald M. Tennant,H.-H. Vuong,B. E. Weir +28 more
TL;DR: In this article, the authors demonstrate that I/sub Dsat/ deteriorates for gate oxides thicker or thinner than this, and they also show that the performance of sub-100 nm nMOSFETs deteriorates with gate oxide thickness of 1-2 nm.
Proceedings ArticleDOI
The ballistic nano-transistor
Gregory Timp,J. Bude,K.K. Bourdelle,J. P. Garno,A. Ghetti,H.-J. Gossmann,Martin L. Green,G. Forsyth,Y.O. Kim,Rafael N. Kleiman,F.P. Klemens,A. Kornblit,C. Lochstampfor,William M. Mansfield,S. Moccio,T.W. Sorsch,Donald M. Tennant,Winston Timp,R. Tung +18 more
TL;DR: In this paper, gate oxides in sub-30 nm effective channel length nMOSFETs were used to achieve extremely high drive current performance and ballistic (T>0.8) transport.
Journal ArticleDOI
Quantification of scanning capacitance microscopy imaging of the pn junction through electrical simulation
TL;DR: In this paper, the bias voltage dependence of these images has motivated the use of scanning capacitance microscopy (SCM) technique in greater detail to determine the cross-sectional doping profiles of very small transistors.
Journal ArticleDOI
Understanding the limits of ultrathin SiO 2 and Si-O-N gate dielectrics for sub-50 nm CMOS
Martin L. Green,T.W. Sorsch,Gregory Timp,David A. Muller,B. E. Weir,P. J. Silverman,S. Moccio,Y.O. Kim +7 more
TL;DR: In this article, the authors argue that none of these problems are limitations for thicknesses greater than about 1.3 nm, and that the fundamental problems of high tunneling current and reduced current drive will prevent further scaling, unless alternate gate dielectrics are introduced.